UART Entity Reference

A general purpose UART with automatic baudrate. More...

Inherits UART::ar_UART.

Inherited by ar_APB_UART, and lpp_uart [private].

List of all members.

Architectures
ar_UART	Architecture
Libraries
IEEE
lpp
Packages
numeric_std
std_logic_1164
lpp_uart	Package <lpp_uart>
Generics
Data_sz	integer := 8
	Data width.
Ports
clk	in std_logic
	System clock.
reset	in std_logic
	System reset.
TXD	out std_logic
	UART Transmission pin.
RXD	in std_logic
	UART Reception pin.
Capture	in std_logic
	Automatic baudrate module reset.
NwDat	out std_logic
	New data flag, means that a new data have been received by the UART.
ACK	in std_logic
	Acknowledge flag to clear NwDat flag.
Send	in std_logic
	To send a data you have to set this flag.
Sended	out std_logic
	When this flag is set you can sed a new data.
BTrigger	out std_logic_vector ( 11 downto 0 )
	Baudrate generator current value, could be usefull if you whant to know the current value of the baudrate or of the oscillator (it suppose that you know baudrate).
RDATA	out std_logic_vector ( Data_sz -1 downto 0 )
	Current read word.
WDATA	in std_logic_vector ( Data_sz -1 downto 0 )
	Put here the word you whant to send.

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Detailed Description

A general purpose UART with automatic baudrate.

Author:

Alexis Jeandet alexis.jeandet@lpp.polytechnique.fr

Definition at line 32 of file UART.vhd.

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Member Data Documentation

ACK in std_logic [Port]

Acknowledge flag to clear NwDat flag.

Reimplemented in ar_APB_UART.

Definition at line 41 of file UART.vhd.

BTrigger out std_logic_vector ( 11 downto 0 ) [Port]

Baudrate generator current value, could be usefull if you whant to know the current value of the baudrate or of the oscillator (it suppose that you know baudrate).

Definition at line 44 of file UART.vhd.

Capture in std_logic [Port]

Automatic baudrate module reset.

Reimplemented in ar_APB_UART.

Definition at line 39 of file UART.vhd.

clk in std_logic [Port]

System clock.

Reimplemented from Shift_REG.

Reimplemented in APB_UART.

Definition at line 35 of file UART.vhd.

Data_sz integer := 8 [Generic]

Data width.

Reimplemented from Shift_REG.

Reimplemented in APB_UART.

Definition at line 33 of file UART.vhd.

IEEE library [Library]

Reimplemented from Shift_REG.

Definition at line 22 of file UART.vhd.

lpp library [Library]

Reimplemented in APB_UART, and lpp_uart.

Definition at line 25 of file UART.vhd.

lpp_uart package [Package]

Reimplemented in APB_UART.

Definition at line 26 of file UART.vhd.

numeric_std package [Package]

Reimplemented from Shift_REG.

Definition at line 23 of file UART.vhd.

NwDat out std_logic [Port]

New data flag, means that a new data have been received by the UART.

Definition at line 40 of file UART.vhd.

RDATA out std_logic_vector ( Data_sz -1 downto 0 ) [Port]

Current read word.

Definition at line 45 of file UART.vhd.

reset in std_logic [Port]

System reset.

Reimplemented from Shift_REG.

Definition at line 36 of file UART.vhd.

RXD in std_logic [Port]

UART Reception pin.

Reimplemented in APB_UART.

Definition at line 38 of file UART.vhd.

Send in std_logic [Port]

To send a data you have to set this flag.

Reimplemented in ar_APB_UART.

Definition at line 42 of file UART.vhd.

Sended out std_logic [Port]

When this flag is set you can sed a new data.

Reimplemented in ar_APB_UART.

Definition at line 43 of file UART.vhd.

std_logic_1164 package [Package]

Reimplemented from Shift_REG.

Reimplemented in APB_UART, and lpp_uart.

Definition at line 24 of file UART.vhd.

TXD out std_logic [Port]

UART Transmission pin.

Reimplemented in APB_UART.

Definition at line 37 of file UART.vhd.

WDATA in std_logic_vector ( Data_sz -1 downto 0 ) [Port]

Put here the word you whant to send.

Definition at line 46 of file UART.vhd.

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The documentation for this class was generated from the following file:

• lpp_uart/UART.vhd