00001 ------------------------------------------------------------------------------ 00002 -- This file is a part of the LPP VHDL IP LIBRARY 00003 -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS 00004 -- 00005 -- This program is free software; you can redistribute it and/or modify 00006 -- it under the terms of the GNU General Public License as published by 00007 -- the Free Software Foundation; either version 3 of the License, or 00008 -- (at your option) any later version. 00009 -- 00010 -- This program is distributed in the hope that it will be useful, 00011 -- but WITHOUT ANY WARRANTY; without even the implied warranty of 00012 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00013 -- GNU General Public License for more details. 00014 -- 00015 -- You should have received a copy of the GNU General Public License 00016 -- along with this program; if not, write to the Free Software 00017 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 00018 ------------------------------------------------------------------------------ 00019 -- Author : Martin Morlot 00020 -- Mail : martin.morlot@lpp.polytechnique.fr 00021 ------------------------------------------------------------------------------ 00022 library ieee; 00023 use ieee.std_logic_1164.all; 00024 library grlib; 00025 use grlib.amba.all; 00026 use grlib.stdlib.all; 00027 use grlib.devices.all; 00028 library lpp; 00029 use lpp.lpp_amba.all; 00030 use lpp.apb_devices_list.all; 00031 use lpp.lpp_cna.all; 00032 00034 00035 entity APB_CNA is 00036 generic ( 00037 pindex : integer := 0; 00038 paddr : integer := 0; 00039 pmask : integer := 16#fff#; 00040 pirq : integer := 0; 00041 abits : integer := 8); 00042 port ( 00043 clk : in std_logic; 00044 rst : in std_logic; 00045 apbi : in apb_slv_in_type; 00046 apbo : out apb_slv_out_type; 00047 SYNC : out std_logic; 00048 SCLK : out std_logic; 00049 DATA : out std_logic 00050 ); 00051 end APB_CNA; 00052 00055 00056 architecture ar_APB_CNA of APB_CNA is 00057 00058 constant REVISION : integer := 1; 00059 00060 constant pconfig : apb_config_type := ( 00061 0 => ahb_device_reg (VENDOR_LPP, LPP_CNA, 0, REVISION, 0), 00062 1 => apb_iobar(paddr, pmask)); 00063 00064 signal enable : std_logic; 00065 signal flag_sd : std_logic; 00066 00067 type CNA_ctrlr_Reg is record 00068 CNA_Cfg : std_logic_vector(1 downto 0); 00069 CNA_Data : std_logic_vector(15 downto 0); 00070 end record; 00071 00072 signal Rec : CNA_ctrlr_Reg; 00073 signal Rdata : std_logic_vector(31 downto 0); 00074 00075 begin 00076 00077 enable <= Rec.CNA_Cfg(0); 00078 Rec.CNA_Cfg(1) <= flag_sd; 00079 00080 CONVERTER : CNA_TabloC 00081 port map(clk,rst,enable,Rec.CNA_Data,SYNC,SCLK,flag_sd,Data); 00082 00083 00084 process(rst,clk) 00085 begin 00086 if(rst='0')then 00087 Rec.CNA_Data <= (others => '0'); 00088 00089 elsif(clk'event and clk='1')then 00090 00091 00092 --APB Write OP 00093 if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then 00094 case apbi.paddr(abits-1 downto 2) is 00095 when "000000" => 00096 Rec.CNA_Cfg(0) <= apbi.pwdata(0); 00097 when "000001" => 00098 Rec.CNA_Data <= apbi.pwdata(15 downto 0); 00099 when others => 00100 null; 00101 end case; 00102 end if; 00103 00104 --APB READ OP 00105 if (apbi.psel(pindex) and (not apbi.pwrite)) = '1' then 00106 case apbi.paddr(abits-1 downto 2) is 00107 when "000000" => 00108 Rdata(31 downto 2) <= X"ABCDEF5" & "00"; 00109 Rdata(1 downto 0) <= Rec.CNA_Cfg; 00110 when "000001" => 00111 Rdata(31 downto 16) <= X"FD18"; 00112 Rdata(15 downto 0) <= Rec.CNA_Data; 00113 when others => 00114 Rdata <= (others => '0'); 00115 end case; 00116 end if; 00117 00118 end if; 00119 apbo.pconfig <= pconfig; 00120 end process; 00121 00122 apbo.prdata <= Rdata when apbi.penable = '1'; 00123 end ar_APB_CNA;
© Copyright 2011 LPP-CNRS | Design by Alexis Jeandet