CNA_TabloC Entity Reference

Programme du Convertisseur Numérique/Analogique. More...

Inherits CNA_TabloC::ar_CNA_TabloC.

Inherited by ar_APB_CNA, and lpp_cna [private].

List of all members.

Architectures
ar_CNA_TabloC	Architecture
Libraries
IEEE
Packages
std_logic_1164
numeric_std
Convertisseur_config	Package <Convertisseur_config>
Ports
clock	in std_logic
	Horloge du composant.
rst	in std_logic
	Reset general du composant.
enable	in std_logic
	Autorise ou non l'utilisation du composant.
Data_C	in std_logic_vector ( 15 downto 0 )
	Donnée Numérique d'entrée sur 16 bits.
SYNC	out std_logic
	Signal de synchronisation du convertisseur.
SCLK	out std_logic
	Horloge systeme du convertisseur.
flag_sd	out std_logic
	Flag, signale la fin de la sérialisation d'une donnée.
Data	out std_logic
	Donnée numérique sérialisé.

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Detailed Description

Programme du Convertisseur Numérique/Analogique.

Definition at line 29 of file CNA_TabloC.vhd.

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Member Data Documentation

clock in std_logic [Port]

Horloge du composant.

Definition at line 31 of file CNA_TabloC.vhd.

Convertisseur_config package [Package]

Definition at line 25 of file CNA_TabloC.vhd.

Data out std_logic [Port]

Donnée numérique sérialisé.

Definition at line 38 of file CNA_TabloC.vhd.

Data_C in std_logic_vector ( 15 downto 0 ) [Port]

Donnée Numérique d'entrée sur 16 bits.

Definition at line 34 of file CNA_TabloC.vhd.

enable in std_logic [Port]

Autorise ou non l'utilisation du composant.

Reimplemented from Gene_SYNC.

Reimplemented in ar_APB_CNA.

Definition at line 33 of file CNA_TabloC.vhd.

flag_sd out std_logic [Port]

Flag, signale la fin de la sérialisation d'une donnée.

Reimplemented in ar_APB_CNA.

Definition at line 37 of file CNA_TabloC.vhd.

IEEE library [Library]

Reimplemented from Gene_SYNC.

Definition at line 22 of file CNA_TabloC.vhd.

numeric_std package [Package]

Reimplemented from Gene_SYNC.

Definition at line 24 of file CNA_TabloC.vhd.

rst in std_logic [Port]

Reset general du composant.

Reimplemented in APB_CNA.

Definition at line 32 of file CNA_TabloC.vhd.

SCLK out std_logic [Port]

Horloge systeme du convertisseur.

Reimplemented from Gene_SYNC.

Reimplemented in APB_CNA.

Definition at line 36 of file CNA_TabloC.vhd.

std_logic_1164 package [Package]

Reimplemented from Gene_SYNC.

Reimplemented in APB_CNA.

Definition at line 23 of file CNA_TabloC.vhd.

SYNC out std_logic [Port]

Signal de synchronisation du convertisseur.

Reimplemented from Gene_SYNC.

Reimplemented in APB_CNA.

Definition at line 35 of file CNA_TabloC.vhd.

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The documentation for this class was generated from the following file:

• lpp_cna/CNA_TabloC.vhd