AD7688_drvr Entity Reference

AD7688 driver, generates all needed signal to drive this ADC. More...

Inherits AD7688_drvr::ar_AD7688_drvr.

Inherited by lpp_ad_conv [private], and ar_lpp_apb_ad_conv.

List of all members.



Architectures

ar_AD7688_drvr Architecture

Libraries

IEEE 
lpp 

Packages

STD_LOGIC_1164 
lpp_ad_conv  Package <lpp_ad_conv>
general_purpose  Package <general_purpose>

Generics

ChanelCount  integer
 Number of ADC you whant to drive.
clkkHz  integer
 System clock frequency in kHz usefull to generate some pulses with good width.

Ports

clk  in std_logic
 System clock.
reset  in std_logic
 System reset.
smplClk  in std_logic
 Sampling clock.
DataReady  out std_logic
 New sample available.
smpout  out Samples_out ( ChanelCount -1 downto 0 )
 Samples.
AD_in  in AD7688_in ( ChanelCount -1 downto 0 )
 Input signals for ADC see lpp.lpp_ad_conv.
AD_out  out AD7688_out
 Output signals for ADC see lpp.lpp_ad_conv.

Detailed Description

AD7688 driver, generates all needed signal to drive this ADC.

Author:
Alexis Jeandet alexis.jeandet@lpp.polytechnique.fr

Definition at line 33 of file AD7688_drvr.vhd.


Member Data Documentation

AD_in in AD7688_in ( ChanelCount -1 downto 0 ) [Port]

Input signals for ADC see lpp.lpp_ad_conv.

Definition at line 44 of file AD7688_drvr.vhd.

AD_out out AD7688_out [Port]

Output signals for ADC see lpp.lpp_ad_conv.

Definition at line 45 of file AD7688_drvr.vhd.

ChanelCount integer [Generic]

Number of ADC you whant to drive.

Reimplemented from AD7688_spi_if.

Definition at line 35 of file AD7688_drvr.vhd.

clk in std_logic [Port]

System clock.

Reimplemented from AD7688_spi_if.

Definition at line 39 of file AD7688_drvr.vhd.

clkkHz integer [Generic]

System clock frequency in kHz usefull to generate some pulses with good width.

Definition at line 36 of file AD7688_drvr.vhd.

DataReady out std_logic [Port]

New sample available.

Reimplemented from AD7688_spi_if.

Definition at line 42 of file AD7688_drvr.vhd.

general_purpose package [Package]

Reimplemented from AD7688_spi_if.

Definition at line 26 of file AD7688_drvr.vhd.

IEEE library [Library]

Reimplemented from AD7688_spi_if.

Definition at line 22 of file AD7688_drvr.vhd.

lpp library [Library]

Reimplemented from AD7688_spi_if.

Definition at line 24 of file AD7688_drvr.vhd.

lpp_ad_conv package [Package]

Reimplemented from AD7688_spi_if.

Definition at line 25 of file AD7688_drvr.vhd.

reset in std_logic [Port]

System reset.

Reimplemented from AD7688_spi_if.

Definition at line 40 of file AD7688_drvr.vhd.

smplClk in std_logic [Port]

Sampling clock.

Definition at line 41 of file AD7688_drvr.vhd.

smpout out Samples_out ( ChanelCount -1 downto 0 ) [Port]

Samples.

Reimplemented from AD7688_spi_if.

Definition at line 43 of file AD7688_drvr.vhd.

STD_LOGIC_1164 package [Package]

Reimplemented from AD7688_spi_if.

Definition at line 23 of file AD7688_drvr.vhd.


The documentation for this class was generated from the following file: