APB_FIFO Entity Reference

Driver APB, va faire le lien entre l'IP VHDL de la FIFO et le bus Amba. More...

Inherits APB_FIFO::ar_APB_FIFO.

Inherited by lpp_memory [private].

List of all members.

Architectures
ar_APB_FIFO	Architecture
Libraries
ieee
grlib
lpp
Packages
std_logic_1164
amba
stdlib
devices
lpp_amba	Package <lpp_amba>
apb_devices_list
lpp_memory	Package <lpp_memory>
Generics
pindex	integer := 0
paddr	integer := 0
pmask	integer := 16#fff#
pirq	integer := 0
abits	integer := 8
Data_sz	integer := 16
Addr_sz	integer := 8
addr_max_int	integer := 256
Ports
clk	in std_logic
	Horloge du composant.
rst	in std_logic
	Reset general du composant.
apbi	in apb_slv_in_type
	Registre de gestion des entrées du bus.
apbo	out apb_slv_out_type
	Registre de gestion des sorties du bus.

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Detailed Description

Driver APB, va faire le lien entre l'IP VHDL de la FIFO et le bus Amba.

Definition at line 35 of file APB_FIFO.vhd.

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Member Data Documentation

abits integer := 8 [Generic]

Definition at line 41 of file APB_FIFO.vhd.

addr_max_int integer := 256 [Generic]

Reimplemented from Top_FIFO.

Definition at line 44 of file APB_FIFO.vhd.

Addr_sz integer := 8 [Generic]

Reimplemented from Top_FIFO.

Definition at line 43 of file APB_FIFO.vhd.

amba package [Package]

Definition at line 25 of file APB_FIFO.vhd.

apb_devices_list package [Package]

Definition at line 30 of file APB_FIFO.vhd.

apbi in apb_slv_in_type [Port]

Registre de gestion des entrées du bus.

Definition at line 48 of file APB_FIFO.vhd.

apbo out apb_slv_out_type [Port]

Registre de gestion des sorties du bus.

Definition at line 49 of file APB_FIFO.vhd.

clk in std_logic [Port]

Horloge du composant.

Reimplemented from Top_FIFO.

Definition at line 46 of file APB_FIFO.vhd.

Data_sz integer := 16 [Generic]

Reimplemented from Top_FIFO.

Definition at line 42 of file APB_FIFO.vhd.

devices package [Package]

Definition at line 27 of file APB_FIFO.vhd.

grlib library [Library]

Definition at line 24 of file APB_FIFO.vhd.

ieee library [Library]

Definition at line 22 of file APB_FIFO.vhd.

lpp library [Library]

Definition at line 28 of file APB_FIFO.vhd.

lpp_amba package [Package]

Definition at line 29 of file APB_FIFO.vhd.

lpp_memory package [Package]

Reimplemented from Top_FIFO.

Definition at line 31 of file APB_FIFO.vhd.

paddr integer := 0 [Generic]

Definition at line 38 of file APB_FIFO.vhd.

pindex integer := 0 [Generic]

Definition at line 37 of file APB_FIFO.vhd.

pirq integer := 0 [Generic]

Definition at line 40 of file APB_FIFO.vhd.

pmask integer := 16#fff# [Generic]

Definition at line 39 of file APB_FIFO.vhd.

rst in std_logic [Port]

Reset general du composant.

Definition at line 47 of file APB_FIFO.vhd.

std_logic_1164 package [Package]

Reimplemented from Top_FIFO.

Definition at line 23 of file APB_FIFO.vhd.

stdlib package [Package]

Definition at line 26 of file APB_FIFO.vhd.

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The documentation for this class was generated from the following file:

• lpp_memory/APB_FIFO.vhd