Inherited by Clk_divider.

Processes
PROCESS_17	( reset , clk )
Constants
clk_TRIGER	integer := ( OSC_freqHz / ( 2 TargetFreq_Hz* ) ) +1**
Signals
cpt1	integer
clk_int	std_logic := ' 0 '

Detailed Description

Definition at line 34 of file Clk_divider.vhd.

Member Function Documentation

[Process]

PROCESS_17		( reset ,
		clk )

Definition at line 49 of file Clk_divider.vhd.

clk_int std_logic := ' 0 ' [Signal]

Definition at line 41 of file Clk_divider.vhd.

clk_TRIGER integer := ( OSC_freqHz / ( 2 *TargetFreq_Hz ) ) +1 [Constant]

Definition at line 36 of file Clk_divider.vhd.

cpt1 integer [Signal]

Definition at line 39 of file Clk_divider.vhd.

The documentation for this class was generated from the following file: