Public Member Functions | Public Attributes

ar_ADS7886_drvr Architecture Reference

Inherits Clk_divider, and AD7688_spi_if.

Inherited by ADS7886_drvr.

List of all members.



Processes

sckgen  ( clk , reset )

Constants

convTrigger  integer := clkkHz *1/1000

Signals

i  integer range 0 to convTrigger := 0
clk_int  std_logic
smplClk_reg  std_logic
cnv_int  std_logic
smpout_int  Samples_out ( ChanelCount -1 downto 0 )

Component Instantiations

clkdivider Clk_divider <Entity Clk_divider>
spidrvr AD7688_spi_if <Entity AD7688_spi_if>

Detailed Description

Definition at line 40 of file ADS7886_drvr.vhd.

Member Function Documentation

[Process]
sckgen ( clk ,
reset )

Definition at line 69 of file ADS7886_drvr.vhd.

Member Data Documentation

clk_int std_logic [Signal]

Definition at line 45 of file ADS7886_drvr.vhd.

clkdivider Clk_divider [Component Instantiation]

Definition at line 55 of file ADS7886_drvr.vhd.

cnv_int std_logic [Signal]

Definition at line 47 of file ADS7886_drvr.vhd.

convTrigger integer := clkkHz *1/1000 [Constant]

Definition at line 42 of file ADS7886_drvr.vhd.

i integer range 0 to convTrigger := 0 [Signal]

Reimplemented from ar_AD7688_spi_if.

Definition at line 44 of file ADS7886_drvr.vhd.

smplClk_reg std_logic [Signal]

Definition at line 46 of file ADS7886_drvr.vhd.

smpout_int Samples_out ( ChanelCount -1 downto 0 ) [Signal]

Definition at line 48 of file ADS7886_drvr.vhd.

spidrvr AD7688_spi_if [Component Instantiation]

Definition at line 98 of file ADS7886_drvr.vhd.

The documentation for this class was generated from the following file: