ar_BaudGen Architecture Reference

Inherited by BaudGen.

List of all members.

Processes
BaudGeneration	( clk , reset )
PROCESS_40	( clk )
Signals
cpt	std_logic_vector ( 11 downto 0 ) := ( others = > ' 0 ' )
errorFlag	std_logic
triger	std_logic_vector ( 11 downto 0 ) := ( others = > ' 0 ' )
RX_reg	std_logic := ' 1 '

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Detailed Description

Definition at line 43 of file BaudGen.vhd.

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Member Function Documentation

[Process]

BaudGeneration		( clk ,
		reset )

Definition at line 56 of file BaudGen.vhd.

[Process]

PROCESS_40

( clk )

Definition at line 92 of file BaudGen.vhd.

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Member Data Documentation

cpt std_logic_vector ( 11 downto 0 ) := ( others = > ' 0 ' ) [Signal]

Definition at line 44 of file BaudGen.vhd.

errorFlag std_logic [Signal]

Definition at line 45 of file BaudGen.vhd.

RX_reg std_logic := ' 1 ' [Signal]

Definition at line 47 of file BaudGen.vhd.

triger std_logic_vector ( 11 downto 0 ) := ( others = > ' 0 ' ) [Signal]

Definition at line 46 of file BaudGen.vhd.

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The documentation for this class was generated from the following file:

• lpp_uart/BaudGen.vhd