Inherits MAC_MUX::ar_MAC_MUX.
Inherited by general_purpose [private], and ar_MAC.
Architectures | |
| ar_MAC_MUX | Architecture |
Libraries | |
| IEEE | |
| lpp | |
Packages | |
| numeric_std | |
| std_logic_1164 | |
| general_purpose | Package <general_purpose> |
Generics | |
| Input_SZ_A | integer := 16 |
| Input_SZ_B | integer := 16 |
Ports | |
| sel | in std_logic |
| INA1 | in std_logic_vector ( Input_SZ_A -1 downto 0 ) |
| INA2 | in std_logic_vector ( Input_SZ_A -1 downto 0 ) |
| INB1 | in std_logic_vector ( Input_SZ_B -1 downto 0 ) |
| INB2 | in std_logic_vector ( Input_SZ_B -1 downto 0 ) |
| OUTA | out std_logic_vector ( Input_SZ_A -1 downto 0 ) |
| OUTB | out std_logic_vector ( Input_SZ_B -1 downto 0 ) |
Definition at line 30 of file MAC_MUX.vhd.
general_purpose package [Package] |
Definition at line 26 of file MAC_MUX.vhd.
IEEE library [Library] |
Definition at line 22 of file MAC_MUX.vhd.
INA1 in std_logic_vector ( Input_SZ_A -1 downto 0 ) [Port] |
Definition at line 38 of file MAC_MUX.vhd.
INA2 in std_logic_vector ( Input_SZ_A -1 downto 0 ) [Port] |
Definition at line 39 of file MAC_MUX.vhd.
INB1 in std_logic_vector ( Input_SZ_B -1 downto 0 ) [Port] |
Definition at line 40 of file MAC_MUX.vhd.
INB2 in std_logic_vector ( Input_SZ_B -1 downto 0 ) [Port] |
Definition at line 41 of file MAC_MUX.vhd.
Input_SZ_A integer := 16 [Generic] |
Definition at line 32 of file MAC_MUX.vhd.
Input_SZ_B integer := 16 [Generic] |
Definition at line 33 of file MAC_MUX.vhd.
lpp library [Library] |
Definition at line 25 of file MAC_MUX.vhd.
numeric_std package [Package] |
Definition at line 23 of file MAC_MUX.vhd.
OUTA out std_logic_vector ( Input_SZ_A -1 downto 0 ) [Port] |
Definition at line 42 of file MAC_MUX.vhd.
OUTB out std_logic_vector ( Input_SZ_B -1 downto 0 ) [Port] |
Definition at line 43 of file MAC_MUX.vhd.
sel in std_logic [Port] |
Definition at line 37 of file MAC_MUX.vhd.
std_logic_1164 package [Package] |
Definition at line 24 of file MAC_MUX.vhd.