Inherited by Multiplier.
Processes | |
| PROCESS_19 | ( clk , reset ) |
Signals | |
| REG | std_logic_vector ( Input_SZ_A +Input_SZ_B -1 downto 0 ) |
| RESMULT | std_logic_vector ( Input_SZ_A +Input_SZ_B -1 downto 0 ) |
Definition at line 51 of file Multiplier.vhd.
| PROCESS_19 | ( clk , | |
| reset ) |
Definition at line 61 of file Multiplier.vhd.
REG std_logic_vector ( Input_SZ_A +Input_SZ_B -1 downto 0 ) [Signal] |
Definition at line 53 of file Multiplier.vhd.
RESMULT std_logic_vector ( Input_SZ_A +Input_SZ_B -1 downto 0 ) [Signal] |
Definition at line 54 of file Multiplier.vhd.