Inherited by general_purpose [private], and ar_MAC.

Architectures
ar_Multiplier	Architecture
Libraries
IEEE
lpp
Packages
numeric_std
std_logic_1164
general_purpose	Package <general_purpose>
Generics
Input_SZ_A	integer := 16
Input_SZ_B	integer := 16
Ports
clk	in std_logic
reset	in std_logic
mult	in std_logic
OP1	in std_logic_vector ( Input_SZ_A -1 downto 0 )
OP2	in std_logic_vector ( Input_SZ_B -1 downto 0 )
RES	out std_logic_vector ( Input_SZ_A +Input_SZ_B -1 downto 0 )

Detailed Description

Definition at line 31 of file Multiplier.vhd.

Member Data Documentation

clk in std_logic [Port]

Definition at line 38 of file Multiplier.vhd.

general_purpose package [Package]

Definition at line 27 of file Multiplier.vhd.

IEEE library [Library]

Definition at line 22 of file Multiplier.vhd.

Input_SZ_A integer := 16 [Generic]

Definition at line 33 of file Multiplier.vhd.

Input_SZ_B integer := 16 [Generic]

Definition at line 34 of file Multiplier.vhd.

lpp library [Library]

Definition at line 26 of file Multiplier.vhd.

mult in std_logic [Port]

Definition at line 40 of file Multiplier.vhd.

numeric_std package [Package]

Definition at line 23 of file Multiplier.vhd.

OP1 in std_logic_vector ( Input_SZ_A -1 downto 0 ) [Port]

Definition at line 41 of file Multiplier.vhd.

OP2 in std_logic_vector ( Input_SZ_B -1 downto 0 ) [Port]

Definition at line 42 of file Multiplier.vhd.

RES out std_logic_vector ( Input_SZ_A +Input_SZ_B -1 downto 0 ) [Port]

Definition at line 43 of file Multiplier.vhd.

reset in std_logic [Port]

Definition at line 39 of file Multiplier.vhd.

std_logic_1164 package [Package]

Definition at line 24 of file Multiplier.vhd.

The documentation for this class was generated from the following file: