Inherits REG::ar_REG.
Inherited by ar_FILTER_RAM_CTRLR, ar_FilterCTRLR, general_purpose [private], and ar_RAM_CTRLR2.
Architectures | |
| ar_REG | Architecture |
Libraries | |
| IEEE | |
| lpp | |
Packages | |
| numeric_std | |
| std_logic_1164 | |
| general_purpose | Package <general_purpose> |
Generics | |
| size | integer := 16 |
| initial_VALUE | integer := 0 |
Ports | |
| reset | in std_logic |
| clk | in std_logic |
| D | in std_logic_vector ( size -1 downto 0 ) |
| Q | out std_logic_vector ( size -1 downto 0 ) |
Definition at line 28 of file REG.vhd.
clk in std_logic [Port] |
Reimplemented in FILTER_RAM_CTRLR, and RAM_CTRLR2.
general_purpose package [Package] |
Reimplemented in FILTER_RAM_CTRLR, and RAM_CTRLR2.
IEEE library [Library] |
Reimplemented in FILTER_RAM_CTRLR, and RAM_CTRLR2.
initial_VALUE integer := 0 [Generic] |
lpp library [Library] |
Reimplemented in FILTER_RAM_CTRLR, iir_filter, and RAM_CTRLR2.
numeric_std package [Package] |
Reimplemented in FILTER_RAM_CTRLR, and RAM_CTRLR2.
reset in std_logic [Port] |
Reimplemented in FILTER_RAM_CTRLR, and RAM_CTRLR2.
std_logic_1164 package [Package] |
Reimplemented in FILTER_RAM_CTRLR, iir_filter, and RAM_CTRLR2.