ar_Top_FifoRead Architecture Reference

Inherits Fifo_Read, and Link_Reg.

Inherited by Top_FifoRead.

List of all members.



Processes

PROCESS_37  ( clk , raz )

Components

syncram_2p 

Signals

Raddr_int  std_logic_vector ( Addr_sz -1 downto 0 )
s_flag_RE  std_logic
s_empty  std_logic

Component Instantiations

SRAM syncram_2p
RE Fifo_Read <Entity Fifo_Read>
link Link_Reg <Entity Link_Reg>

Detailed Description

Une mémoire SRAM de chez Gaisler est utilisée, associée a une fifo, utilisé pour la lecture

Definition at line 51 of file Top_FifoRead.vhd.


Member Function Documentation

[Process]
PROCESS_37 ( clk ,
raz )

Definition at line 85 of file Top_FifoRead.vhd.


Member Data Documentation

link Link_Reg [Component Instantiation]

Definition at line 81 of file Top_FifoRead.vhd.

Raddr_int std_logic_vector ( Addr_sz -1 downto 0 ) [Signal]

Definition at line 66 of file Top_FifoRead.vhd.

RE Fifo_Read [Component Instantiation]

Definition at line 77 of file Top_FifoRead.vhd.

s_empty std_logic [Signal]

Definition at line 68 of file Top_FifoRead.vhd.

s_flag_RE std_logic [Signal]

Definition at line 67 of file Top_FifoRead.vhd.

SRAM syncram_2p [Component Instantiation]

Definition at line 72 of file Top_FifoRead.vhd.

syncram_2p [Component]

Definition at line 53 of file Top_FifoRead.vhd.


The documentation for this class was generated from the following file: