MAC_MUX2 Entity Reference

Inherits MAC_MUX2::ar_MAC_MUX2.

Inherited by general_purpose [private], and ar_MAC.

List of all members.



Architectures

ar_MAC_MUX2 Architecture

Libraries

IEEE 
lpp 

Packages

numeric_std 
std_logic_1164 
general_purpose  Package <general_purpose>

Generics

Input_SZ  integer := 16

Ports

sel  in std_logic
RES1  in std_logic_vector ( Input_SZ -1 downto 0 )
RES2  in std_logic_vector ( Input_SZ -1 downto 0 )
RES  out std_logic_vector ( Input_SZ -1 downto 0 )

Detailed Description

Definition at line 30 of file MAC_MUX2.vhd.


Member Data Documentation

general_purpose package [Package]

Reimplemented in APB_IIR_CEL, IIR_CEL_CTRLR, IIR_CEL_FILTER, ALU, and MAC.

Definition at line 26 of file MAC_MUX2.vhd.

IEEE library [Library]

Reimplemented in IIR_CEL_CTRLR, IIR_CEL_FILTER, TestbenshMAC, ALU, MAC, and TestbenshALU.

Definition at line 22 of file MAC_MUX2.vhd.

Input_SZ integer := 16 [Generic]

Definition at line 31 of file MAC_MUX2.vhd.

lpp library [Library]

Reimplemented in APB_IIR_CEL, IIR_CEL_CTRLR, IIR_CEL_FILTER, ALU, and MAC.

Definition at line 25 of file MAC_MUX2.vhd.

numeric_std package [Package]

Reimplemented in APB_IIR_CEL, IIR_CEL_CTRLR, IIR_CEL_FILTER, TestbenshMAC, ALU, MAC, and TestbenshALU.

Definition at line 23 of file MAC_MUX2.vhd.

RES out std_logic_vector ( Input_SZ -1 downto 0 ) [Port]

Reimplemented in ALU, and MAC.

Definition at line 36 of file MAC_MUX2.vhd.

RES1 in std_logic_vector ( Input_SZ -1 downto 0 ) [Port]

Definition at line 34 of file MAC_MUX2.vhd.

RES2 in std_logic_vector ( Input_SZ -1 downto 0 ) [Port]

Definition at line 35 of file MAC_MUX2.vhd.

sel in std_logic [Port]

Definition at line 33 of file MAC_MUX2.vhd.

std_logic_1164 package [Package]

Reimplemented in APB_IIR_CEL, IIR_CEL_CTRLR, IIR_CEL_FILTER, TestbenshMAC, ALU, MAC, and TestbenshALU.

Definition at line 24 of file MAC_MUX2.vhd.


The documentation for this class was generated from the following file: