lpp_apb_ad_conv Member List

This is the complete list of members for lpp_apb_ad_conv, including all inherited members.
CTRL_Regar_lpp_apb_ad_conv [Record]
samplear_lpp_apb_ad_conv [Record]
abitslpp_apb_ad_conv [Generic]
AD7688ar_lpp_apb_ad_conv [Component Instantiation]
AD_inlpp_apb_ad_conv [Port]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.AD7688_drvr.AD_inAD7688_drvr [Port]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.ADS7886_drvr.AD_inADS7886_drvr [Port]
AD_outlpp_apb_ad_conv [Port]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.AD7688_drvr.AD_outAD7688_drvr [Port]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.ADS7886_drvr.AD_outADS7886_drvr [Port]
ADCreflpp_apb_ad_conv [Generic]
ADS7886ar_lpp_apb_ad_conv [Component Instantiation]
ambalpp_apb_ad_conv [Package]
apb_devices_listlpp_apb_ad_conv [Package]
apbilpp_apb_ad_conv [Port]
apbolpp_apb_ad_conv [Port]
ChanelCountlpp_apb_ad_conv [Generic]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.AD7688_drvr.ChanelCountAD7688_drvr [Generic]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.ADS7886_drvr.ChanelCountADS7886_drvr [Generic]
clklpp_apb_ad_conv [Port]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.AD7688_drvr.clkAD7688_drvr [Port]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.ADS7886_drvr.clkADS7886_drvr [Port]
AD7688_drvr.clk_dividedClk_divider [Port]
ADS7886_drvr.clk_dividedClk_divider [Port]
Clk_divider.clk_dividedClk_divider [Port]
AD7688_drvr.clk_intar_AD7688_drvr [Signal]
AD7688_drvr.Clk_divider.clk_intar_Clk_divider [Signal]
ADS7886_drvr.clk_intar_ADS7886_drvr [Signal]
ADS7886_drvr.Clk_divider.clk_intar_Clk_divider [Signal]
Clk_divider.clk_intar_Clk_divider [Signal]
AD7688_drvr.clk_TRIGERar_Clk_divider [Constant]
ADS7886_drvr.clk_TRIGERar_Clk_divider [Constant]
Clk_divider.clk_TRIGERar_Clk_divider [Constant]
clkdividerar_lpp_apb_ad_conv [Component Instantiation]
AD7688_drvr.clkdividerar_AD7688_drvr [Component Instantiation]
ADS7886_drvr.clkdividerar_ADS7886_drvr [Component Instantiation]
clkkHzlpp_apb_ad_conv [Generic]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.AD7688_drvr.clkkHzAD7688_drvr [Generic]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.ADS7886_drvr.clkkHzADS7886_drvr [Generic]
AD7688_drvr.cnvAD7688_spi_if [Port]
ADS7886_drvr.cnvAD7688_spi_if [Port]
AD7688_drvr.cnv_intar_AD7688_drvr [Signal]
ADS7886_drvr.cnv_intar_ADS7886_drvr [Signal]
AD7688_drvr.cnv_regar_AD7688_spi_if [Signal]
ADS7886_drvr.cnv_regar_AD7688_spi_if [Signal]
AD7688_drvr.convTriggerar_AD7688_drvr [Constant]
ADS7886_drvr.convTriggerar_ADS7886_drvr [Constant]
AD7688_drvr.cpt1ar_Clk_divider [Signal]
ADS7886_drvr.cpt1ar_Clk_divider [Signal]
Clk_divider.cpt1ar_Clk_divider [Signal]
DataReadyar_lpp_apb_ad_conv [Signal]
AD7688_drvr.DataReadyAD7688_drvr [Port]
ADS7886_drvr.DataReadyADS7886_drvr [Port]
deviceslpp_apb_ad_conv [Package]
general_purposelpp_apb_ad_conv [Package]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.AD7688_drvr.general_purposeAD7688_drvr [Package]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.ADS7886_drvr.general_purposeADS7886_drvr [Package]
grliblpp_apb_ad_conv [Library]
AD7688_drvr.iar_AD7688_drvr [Signal]
ADS7886_drvr.iar_ADS7886_drvr [Signal]
IEEElpp_apb_ad_conv [Library]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.AD7688_drvr.IEEEAD7688_drvr [Library]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.ADS7886_drvr.IEEEADS7886_drvr [Library]
lpplpp_apb_ad_conv [Library]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.AD7688_drvr.lppAD7688_drvr [Library]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.ADS7886_drvr.lppADS7886_drvr [Library]
lpp_ad_convlpp_apb_ad_conv [Package]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.AD7688_drvr.lpp_ad_convAD7688_drvr [Package]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.ADS7886_drvr.lpp_ad_convADS7886_drvr [Package]
lpp_ambalpp_apb_ad_conv [Package]
lpp_apb_ad_conv_Regar_lpp_apb_ad_conv [Record]
numeric_stdlpp_apb_ad_conv [Package]
AD7688_drvr.OSC_freqHzClk_divider [Generic]
ADS7886_drvr.OSC_freqHzClk_divider [Generic]
Clk_divider.OSC_freqHzClk_divider [Generic]
paddrlpp_apb_ad_conv [Generic]
pconfigar_lpp_apb_ad_conv [Constant]
pindexlpp_apb_ad_conv [Generic]
pirqlpp_apb_ad_conv [Generic]
pmasklpp_apb_ad_conv [Generic]
AD7688_drvr.PROCESS_17(reset, clk)ar_Clk_divider [Process]
ADS7886_drvr.PROCESS_17(reset, clk)ar_Clk_divider [Process]
Clk_divider.PROCESS_17(reset, clk)ar_Clk_divider [Process]
AD7688_drvr.PROCESS_23(clk, reset)ar_AD7688_spi_if [Process]
ADS7886_drvr.PROCESS_23(clk, reset)ar_AD7688_spi_if [Process]
PROCESS_24(reset, clk)ar_lpp_apb_ad_conv [Process]
rar_lpp_apb_ad_conv [Signal]
Rdataar_lpp_apb_ad_conv [Signal]
resetlpp_apb_ad_conv [Port]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.AD7688_drvr.resetAD7688_drvr [Port]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.ADS7886_drvr.resetADS7886_drvr [Port]
REVISIONar_lpp_apb_ad_conv [Constant]
AD7688_drvr.sckgen(clk, reset)ar_AD7688_drvr [Process]
ADS7886_drvr.sckgen(clk, reset)ar_ADS7886_drvr [Process]
AD7688_drvr.sdiAD7688_spi_if [Port]
ADS7886_drvr.sdiAD7688_spi_if [Port]
AD7688_drvr.shift_regar_AD7688_spi_if [Signal]
ADS7886_drvr.shift_regar_AD7688_spi_if [Signal]
smpClkHzlpp_apb_ad_conv [Generic]
smplClkar_lpp_apb_ad_conv [Signal]
AD7688_drvr.smplClkAD7688_drvr [Port]
ADS7886_drvr.smplClkADS7886_drvr [Port]
AD7688_drvr.smplClk_regar_AD7688_drvr [Signal]
ADS7886_drvr.smplClk_regar_ADS7886_drvr [Signal]
smpoutar_lpp_apb_ad_conv [Signal]
AD7688_drvr.smpoutAD7688_drvr [Port]
ADS7886_drvr.smpoutADS7886_drvr [Port]
smpout_intar_ADS7886_drvr [Signal]
AD7688_drvr.spidrvrar_AD7688_drvr [Component Instantiation]
ADS7886_drvr.spidrvrar_ADS7886_drvr [Component Instantiation]
STD_LOGIC_1164lpp_apb_ad_conv [Package]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.AD7688_drvr.STD_LOGIC_1164AD7688_drvr [Package]
lpp_apb_ad_conv::ar_lpp_apb_ad_conv.ADS7886_drvr.STD_LOGIC_1164ADS7886_drvr [Package]
stdliblpp_apb_ad_conv [Package]
AD7688_drvr.TargetFreq_HzClk_divider [Generic]
ADS7886_drvr.TargetFreq_HzClk_divider [Generic]
Clk_divider.TargetFreq_HzClk_divider [Generic]