iir_filter Member List

This is the complete list of members for iir_filter, including all inherited members.

regin	AR_APB_IIR_CEL	[Record]
regout	AR_APB_IIR_CEL	[Record]
numCoefs	AR_APB_IIR_CEL	[Record]
denCoefs	AR_APB_IIR_CEL	[Record]
APB_IIR_CEL.numCoefs	ar_IIR_CEL_CTRLR	[Record]
IIR_CEL_CTRLR.numCoefs	ar_IIR_CEL_CTRLR	[Record]
IIR_CEL_FILTER.numCoefs	ar_IIR_CEL_CTRLR	[Record]
APB_IIR_CEL.denCoefs	ar_IIR_CEL_CTRLR	[Record]
IIR_CEL_CTRLR.denCoefs	ar_IIR_CEL_CTRLR	[Record]
IIR_CEL_FILTER.denCoefs	ar_IIR_CEL_CTRLR	[Record]
config	iir_filter	[Record]
virgPos	iir_filter	[Record]
config	iir_filter	[Record]
status	iir_filter	[Record]
abits	APB_IIR_CEL	[Generic]
ADD	iir_filter	[Constant]
APB_IIR_CEL.ADD	MAC_CONTROLER	[Port]
IIR_CEL_CTRLR.ADD	MAC_CONTROLER	[Port]
IIR_CEL_FILTER.ADD	MAC_CONTROLER	[Port]
APB_IIR_CEL.add	ar_MAC	[Signal]
APB_IIR_CEL.Adder.add	Adder	[Port]
IIR_CEL_CTRLR.add	ar_MAC	[Signal]
IIR_CEL_CTRLR.Adder.add	Adder	[Port]
IIR_CEL_FILTER.add	ar_MAC	[Signal]
IIR_CEL_FILTER.Adder.add	Adder	[Port]
APB_IIR_CEL.add_D	ar_MAC	[Signal]
IIR_CEL_CTRLR.add_D	ar_MAC	[Signal]
IIR_CEL_FILTER.add_D	ar_MAC	[Signal]
APB_IIR_CEL.adder_inst	ar_MAC	[Component Instantiation]
IIR_CEL_CTRLR.adder_inst	ar_MAC	[Component Instantiation]
IIR_CEL_FILTER.adder_inst	ar_MAC	[Component Instantiation]
APB_IIR_CEL.ADDERinA	ar_MAC	[Signal]
IIR_CEL_CTRLR.ADDERinA	ar_MAC	[Signal]
IIR_CEL_FILTER.ADDERinA	ar_MAC	[Signal]
APB_IIR_CEL.ADDERinB	ar_MAC	[Signal]
IIR_CEL_CTRLR.ADDERinB	ar_MAC	[Signal]
IIR_CEL_FILTER.ADDERinB	ar_MAC	[Signal]
APB_IIR_CEL.ADDERout	ar_MAC	[Signal]
IIR_CEL_CTRLR.ADDERout	ar_MAC	[Signal]
IIR_CEL_FILTER.ADDERout	ar_MAC	[Signal]
APB_IIR_CEL.ADDRcntr_inst	ar_RAM_CTRLR2	[Component Instantiation]
IIR_CEL_CTRLR.ADDRcntr_inst	ar_RAM_CTRLR2	[Component Instantiation]
IIR_CEL_FILTER.ADDRcntr_inst	ar_RAM_CTRLR2	[Component Instantiation]
RAM_CTRLR2.ADDRcntr_inst	ar_RAM_CTRLR2	[Component Instantiation]
APB_IIR_CEL.addREG	ar_MAC	[Component Instantiation]
IIR_CEL_CTRLR.addREG	ar_MAC	[Component Instantiation]
IIR_CEL_FILTER.addREG	ar_MAC	[Component Instantiation]
APB_IIR_CEL.ADDRreg	ar_RAM_CTRLR2	[Component Instantiation]
IIR_CEL_CTRLR.ADDRreg	ar_RAM_CTRLR2	[Component Instantiation]
IIR_CEL_FILTER.ADDRreg	ar_RAM_CTRLR2	[Component Instantiation]
RAM_CTRLR2.ADDRreg	ar_RAM_CTRLR2	[Component Instantiation]
APB_IIR_CEL.ALU_Coef_in	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_CTRLR.ALU_Coef_in	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_FILTER.ALU_Coef_in	ar_IIR_CEL_CTRLR	[Signal]
APB_IIR_CEL.ALU_ctrl	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_CTRLR.ALU_ctrl	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_FILTER.ALU_ctrl	ar_IIR_CEL_CTRLR	[Signal]
APB_IIR_CEL.ALU_inst	ar_IIR_CEL_CTRLR	[Component Instantiation]
IIR_CEL_CTRLR.ALU_inst	ar_IIR_CEL_CTRLR	[Component Instantiation]
IIR_CEL_FILTER.ALU_inst	ar_IIR_CEL_CTRLR	[Component Instantiation]
APB_IIR_CEL.ALU_out	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_CTRLR.ALU_out	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_FILTER.ALU_out	ar_IIR_CEL_CTRLR	[Signal]
APB_IIR_CEL.ALU_sample_in	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_CTRLR.ALU_sample_in	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_FILTER.ALU_sample_in	ar_IIR_CEL_CTRLR	[Signal]
amba	iir_filter	[Package]
APB_IIR_CEL.amba	APB_IIR_CEL	[Package]
apb_devices_list	APB_IIR_CEL	[Package]
APB_IIR_CEL	iir_filter	[Component]
apbi	APB_IIR_CEL	[Port]
apbo	APB_IIR_CEL	[Port]
APB_IIR_CEL.Arith_en	ALU	[Generic]
IIR_CEL_CTRLR.Arith_en	ALU	[Generic]
IIR_CEL_FILTER.Arith_en	ALU	[Generic]
bootmsg	AR_APB_IIR_CEL	[Component Instantiation]
Cels_count	APB_IIR_CEL	[Generic]
ChanelsCount	APB_IIR_CEL	[Generic]
APB_IIR_CEL.clk	APB_IIR_CEL	[Port]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.clk	RAM_CTRLR2	[Port]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.clk	ADDRcntr	[Port]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.clk	Multiplier	[Port]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.clk	Adder	[Port]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_REG.clk	MAC_REG	[Port]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.clk	RAM_CTRLR2	[Port]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.clk	ADDRcntr	[Port]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.clk	Multiplier	[Port]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.clk	Adder	[Port]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_REG.clk	MAC_REG	[Port]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.clk	RAM_CTRLR2	[Port]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.clk	ADDRcntr	[Port]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.clk	Multiplier	[Port]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.clk	Adder	[Port]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_REG.clk	MAC_REG	[Port]
RAM_CTRLR2.clk	RAM_CTRLR2	[Port]
RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.clk	ADDRcntr	[Port]
APB_IIR_CEL.RAM_CTRLR2.clr	ADDRcntr	[Port]
APB_IIR_CEL.ALU.clr	Adder	[Port]
IIR_CEL_CTRLR.RAM_CTRLR2.clr	ADDRcntr	[Port]
IIR_CEL_CTRLR.ALU.clr	Adder	[Port]
IIR_CEL_FILTER.RAM_CTRLR2.clr	ADDRcntr	[Port]
IIR_CEL_FILTER.ALU.clr	Adder	[Port]
RAM_CTRLR2.clr	ADDRcntr	[Port]
APB_IIR_CEL.clr_MAC	ar_ALU	[Signal]
IIR_CEL_CTRLR.clr_MAC	ar_ALU	[Signal]
IIR_CEL_FILTER.clr_MAC	ar_ALU	[Signal]
clr_mac	iir_filter	[Constant]
APB_IIR_CEL.clr_MAC_D	ar_MAC	[Signal]
IIR_CEL_CTRLR.clr_MAC_D	ar_MAC	[Signal]
IIR_CEL_FILTER.clr_MAC_D	ar_MAC	[Signal]
APB_IIR_CEL.clr_MAC_D_D	ar_MAC	[Signal]
IIR_CEL_CTRLR.clr_MAC_D_D	ar_MAC	[Signal]
IIR_CEL_FILTER.clr_MAC_D_D	ar_MAC	[Signal]
APB_IIR_CEL.clr_MACREG1	ar_MAC	[Component Instantiation]
IIR_CEL_CTRLR.clr_MACREG1	ar_MAC	[Component Instantiation]
IIR_CEL_FILTER.clr_MACREG1	ar_MAC	[Component Instantiation]
APB_IIR_CEL.clr_MACREG2	ar_MAC	[Component Instantiation]
IIR_CEL_CTRLR.clr_MACREG2	ar_MAC	[Component Instantiation]
IIR_CEL_FILTER.clr_MACREG2	ar_MAC	[Component Instantiation]
Coef_SZ	APB_IIR_CEL	[Generic]
CoefCelT	AR_APB_IIR_CEL	[Type]
CoefCntPerCel	APB_IIR_CEL	[Generic]
APB_IIR_CEL.coefs	IIR_CEL_FILTER	[Port]
IIR_CEL_FILTER.coefs	IIR_CEL_FILTER	[Port]
CoefsReg	AR_APB_IIR_CEL	[Signal]
CoefsRegT	AR_APB_IIR_CEL	[Record]
CoefTblT	AR_APB_IIR_CEL	[Type]
APB_IIR_CEL.count	ar_IIR_CEL_CTRLR	[Signal]
APB_IIR_CEL.RAM_CTRLR2.count	RAM_CTRLR2	[Port]
APB_IIR_CEL.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.count	ADDRcntr	[Port]
IIR_CEL_CTRLR.count	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_CTRLR.RAM_CTRLR2.count	RAM_CTRLR2	[Port]
IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.count	ADDRcntr	[Port]
IIR_CEL_FILTER.count	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_FILTER.RAM_CTRLR2.count	RAM_CTRLR2	[Port]
IIR_CEL_FILTER.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.count	ADDRcntr	[Port]
RAM_CTRLR2.count	RAM_CTRLR2	[Port]
RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.count	ADDRcntr	[Port]
APB_IIR_CEL.ctrl	ALU	[Port]
APB_IIR_CEL.ALU::ar_ALU.ctrl	MAC_CONTROLER	[Port]
IIR_CEL_CTRLR.ctrl	ALU	[Port]
IIR_CEL_CTRLR.ALU::ar_ALU.ctrl	MAC_CONTROLER	[Port]
IIR_CEL_FILTER.ctrl	ALU	[Port]
IIR_CEL_FILTER.ALU::ar_ALU.ctrl	MAC_CONTROLER	[Port]
APB_IIR_CEL.CTRLR	ar_IIR_CEL_FILTER	[Component Instantiation]
IIR_CEL_FILTER.CTRLR	ar_IIR_CEL_FILTER	[Component Instantiation]
APB_IIR_CEL.curentCel	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_CTRLR.curentCel	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_FILTER.curentCel	ar_IIR_CEL_CTRLR	[Signal]
APB_IIR_CEL.curentChan	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_CTRLR.curentChan	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_FILTER.curentChan	ar_IIR_CEL_CTRLR	[Signal]
APB_IIR_CEL.RAM_CTRLR2.D	REG	[Port]
APB_IIR_CEL.ALU.D	MAC_REG	[Port]
IIR_CEL_CTRLR.RAM_CTRLR2.D	REG	[Port]
IIR_CEL_CTRLR.ALU.D	MAC_REG	[Port]
IIR_CEL_FILTER.RAM_CTRLR2.D	REG	[Port]
IIR_CEL_FILTER.ALU.D	MAC_REG	[Port]
RAM_CTRLR2.D	REG	[Port]
devices	iir_filter	[Package]
APB_IIR_CEL.devices	APB_IIR_CEL	[Package]
filter	AR_APB_IIR_CEL	[Component Instantiation]
filter_reset	AR_APB_IIR_CEL	[Signal]
APB_IIR_CEL.FILTERcfg	RAM_CTRLR2	[Package]
IIR_CEL_CTRLR.FILTERcfg	RAM_CTRLR2	[Package]
IIR_CEL_FILTER.FILTERcfg	RAM_CTRLR2	[Package]
RAM_CTRLR2.FILTERcfg	RAM_CTRLR2	[Package]
FILTERreg	AR_APB_IIR_CEL	[Record]
APB_IIR_CEL.fsmIIR_CEL_T	ar_IIR_CEL_CTRLR	[Type]
IIR_CEL_CTRLR.fsmIIR_CEL_T	ar_IIR_CEL_CTRLR	[Type]
IIR_CEL_FILTER.fsmIIR_CEL_T	ar_IIR_CEL_CTRLR	[Type]
APB_IIR_CEL.general_purpose	APB_IIR_CEL	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.general_purpose	RAM_CTRLR2	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.general_purpose	ADDRcntr	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.MUX2.general_purpose	MUX2	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_CONTROLER.general_purpose	MAC_CONTROLER	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.general_purpose	Multiplier	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.general_purpose	Adder	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_REG.general_purpose	MAC_REG	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_MUX.general_purpose	MAC_MUX	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.general_purpose	RAM_CTRLR2	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.general_purpose	ADDRcntr	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.MUX2.general_purpose	MUX2	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_CONTROLER.general_purpose	MAC_CONTROLER	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.general_purpose	Multiplier	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.general_purpose	Adder	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_REG.general_purpose	MAC_REG	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_MUX.general_purpose	MAC_MUX	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.general_purpose	RAM_CTRLR2	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.general_purpose	ADDRcntr	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.MUX2.general_purpose	MUX2	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_CONTROLER.general_purpose	MAC_CONTROLER	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.general_purpose	Multiplier	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.general_purpose	Adder	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_REG.general_purpose	MAC_REG	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_MUX.general_purpose	MAC_MUX	[Package]
RAM_CTRLR2.general_purpose	RAM_CTRLR2	[Package]
RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.general_purpose	ADDRcntr	[Package]
RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.MUX2.general_purpose	MUX2	[Package]
APB_IIR_CEL.GO_0	ar_IIR_CEL_CTRLR	[Signal]
APB_IIR_CEL.RAM_CTRLR2.GO_0	RAM_CTRLR2	[Port]
IIR_CEL_CTRLR.GO_0	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_CTRLR.RAM_CTRLR2.GO_0	RAM_CTRLR2	[Port]
IIR_CEL_FILTER.GO_0	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_FILTER.RAM_CTRLR2.GO_0	RAM_CTRLR2	[Port]
RAM_CTRLR2.GO_0	RAM_CTRLR2	[Port]
grlib	iir_filter	[Library]
APB_IIR_CEL.grlib	APB_IIR_CEL	[Library]
IDLE	iir_filter	[Constant]
APB_IIR_CEL.IEEE	IIR_CEL_FILTER	[Library]
APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.IEEE	RAM_CTRLR2	[Library]
APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.IEEE	ADDRcntr	[Library]
APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.MUX2.IEEE	MUX2	[Library]
APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_CONTROLER.IEEE	MAC_CONTROLER	[Library]
APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.IEEE	Multiplier	[Library]
APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.IEEE	Adder	[Library]
APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_REG.IEEE	MAC_REG	[Library]
APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_MUX.IEEE	MAC_MUX	[Library]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.IEEE	RAM_CTRLR2	[Library]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.IEEE	ADDRcntr	[Library]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.MUX2.IEEE	MUX2	[Library]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_CONTROLER.IEEE	MAC_CONTROLER	[Library]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.IEEE	Multiplier	[Library]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.IEEE	Adder	[Library]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_REG.IEEE	MAC_REG	[Library]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_MUX.IEEE	MAC_MUX	[Library]
IIR_CEL_FILTER.IEEE	IIR_CEL_FILTER	[Library]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.IEEE	RAM_CTRLR2	[Library]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.IEEE	ADDRcntr	[Library]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.MUX2.IEEE	MUX2	[Library]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_CONTROLER.IEEE	MAC_CONTROLER	[Library]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.IEEE	Multiplier	[Library]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.IEEE	Adder	[Library]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_REG.IEEE	MAC_REG	[Library]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_MUX.IEEE	MAC_MUX	[Library]
RAM_CTRLR2.IEEE	RAM_CTRLR2	[Library]
RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.IEEE	ADDRcntr	[Library]
RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.MUX2.IEEE	MUX2	[Library]
ieee	iir_filter	[Library]
APB_IIR_CEL.ieee	APB_IIR_CEL	[Library]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.RAM.ieee	RAM	[Library]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.RAM_CEL.ieee	RAM_CEL	[Library]
IIR_CEL_CTRLR.RAM.ieee	RAM	[Library]
IIR_CEL_CTRLR.RAM_CEL.ieee	RAM_CEL	[Library]
RAM.ieee	RAM	[Library]
RAM_CEL.ieee	RAM_CEL	[Library]
IIR_CEL_FILTER.RAM.ieee	RAM	[Library]
IIR_CEL_FILTER.RAM_CEL.ieee	RAM_CEL	[Library]
RAM_CTRLR2.RAM.ieee	RAM	[Library]
RAM_CTRLR2.RAM_CEL.ieee	RAM_CEL	[Library]
IIR_CEL_CTRLR	iir_filter	[Component]
IIR_CEL_FILTER	iir_filter	[Component]
APB_IIR_CEL.IIR_CEL_STATE	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_CTRLR.IIR_CEL_STATE	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_FILTER.IIR_CEL_STATE	ar_IIR_CEL_CTRLR	[Signal]
APB_IIR_CEL.iir_filter	APB_IIR_CEL	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.iir_filter	RAM_CTRLR2	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.iir_filter	RAM_CTRLR2	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.iir_filter	RAM_CTRLR2	[Package]
RAM_CTRLR2.iir_filter	RAM_CTRLR2	[Package]
APB_IIR_CEL.IN1	MUX2	[Port]
IIR_CEL_CTRLR.IN1	MUX2	[Port]
IIR_CEL_FILTER.IN1	MUX2	[Port]
RAM_CTRLR2.IN1	MUX2	[Port]
APB_IIR_CEL.IN2	MUX2	[Port]
IIR_CEL_CTRLR.IN2	MUX2	[Port]
IIR_CEL_FILTER.IN2	MUX2	[Port]
RAM_CTRLR2.IN2	MUX2	[Port]
in_IIR_CEL_reg	iir_filter	[Record]
APB_IIR_CEL.INA1	MAC_MUX	[Port]
IIR_CEL_CTRLR.INA1	MAC_MUX	[Port]
IIR_CEL_FILTER.INA1	MAC_MUX	[Port]
APB_IIR_CEL.INA2	MAC_MUX	[Port]
IIR_CEL_CTRLR.INA2	MAC_MUX	[Port]
IIR_CEL_FILTER.INA2	MAC_MUX	[Port]
APB_IIR_CEL.INB1	MAC_MUX	[Port]
IIR_CEL_CTRLR.INB1	MAC_MUX	[Port]
IIR_CEL_FILTER.INB1	MAC_MUX	[Port]
APB_IIR_CEL.INB2	MAC_MUX	[Port]
IIR_CEL_CTRLR.INB2	MAC_MUX	[Port]
IIR_CEL_FILTER.INB2	MAC_MUX	[Port]
APB_IIR_CEL.initial_VALUE	REG	[Generic]
IIR_CEL_CTRLR.initial_VALUE	REG	[Generic]
IIR_CEL_FILTER.initial_VALUE	REG	[Generic]
RAM_CTRLR2.initial_VALUE	REG	[Generic]
APB_IIR_CEL.RAM_CTRLR2.Input_SZ	MUX2	[Generic]
APB_IIR_CEL.ALU.Input_SZ	MAC_MUX2	[Generic]
IIR_CEL_CTRLR.RAM_CTRLR2.Input_SZ	MUX2	[Generic]
IIR_CEL_CTRLR.ALU.Input_SZ	MAC_MUX2	[Generic]
IIR_CEL_FILTER.RAM_CTRLR2.Input_SZ	MUX2	[Generic]
IIR_CEL_FILTER.ALU.Input_SZ	MAC_MUX2	[Generic]
RAM_CTRLR2.Input_SZ	MUX2	[Generic]
APB_IIR_CEL.RAM_CTRLR2.Input_SZ_1	RAM_CTRLR2	[Generic]
APB_IIR_CEL.ALU.Input_SZ_1	ALU	[Generic]
IIR_CEL_CTRLR.RAM_CTRLR2.Input_SZ_1	RAM_CTRLR2	[Generic]
IIR_CEL_CTRLR.ALU.Input_SZ_1	ALU	[Generic]
IIR_CEL_FILTER.RAM_CTRLR2.Input_SZ_1	RAM_CTRLR2	[Generic]
IIR_CEL_FILTER.ALU.Input_SZ_1	ALU	[Generic]
RAM_CTRLR2.Input_SZ_1	RAM_CTRLR2	[Generic]
APB_IIR_CEL.Input_SZ_2	ALU	[Generic]
IIR_CEL_CTRLR.Input_SZ_2	ALU	[Generic]
IIR_CEL_FILTER.Input_SZ_2	ALU	[Generic]
APB_IIR_CEL.Input_SZ_A	MAC	[Generic]
APB_IIR_CEL.MAC::ar_MAC.Multiplier.Input_SZ_A	Multiplier	[Generic]
APB_IIR_CEL.MAC::ar_MAC.Adder.Input_SZ_A	Adder	[Generic]
APB_IIR_CEL.MAC::ar_MAC.MAC_MUX.Input_SZ_A	MAC_MUX	[Generic]
IIR_CEL_CTRLR.Input_SZ_A	MAC	[Generic]
IIR_CEL_CTRLR.MAC::ar_MAC.Multiplier.Input_SZ_A	Multiplier	[Generic]
IIR_CEL_CTRLR.MAC::ar_MAC.Adder.Input_SZ_A	Adder	[Generic]
IIR_CEL_CTRLR.MAC::ar_MAC.MAC_MUX.Input_SZ_A	MAC_MUX	[Generic]
IIR_CEL_FILTER.Input_SZ_A	MAC	[Generic]
IIR_CEL_FILTER.MAC::ar_MAC.Multiplier.Input_SZ_A	Multiplier	[Generic]
IIR_CEL_FILTER.MAC::ar_MAC.Adder.Input_SZ_A	Adder	[Generic]
IIR_CEL_FILTER.MAC::ar_MAC.MAC_MUX.Input_SZ_A	MAC_MUX	[Generic]
APB_IIR_CEL.Input_SZ_B	MAC	[Generic]
APB_IIR_CEL.MAC::ar_MAC.Multiplier.Input_SZ_B	Multiplier	[Generic]
APB_IIR_CEL.MAC::ar_MAC.Adder.Input_SZ_B	Adder	[Generic]
APB_IIR_CEL.MAC::ar_MAC.MAC_MUX.Input_SZ_B	MAC_MUX	[Generic]
IIR_CEL_CTRLR.Input_SZ_B	MAC	[Generic]
IIR_CEL_CTRLR.MAC::ar_MAC.Multiplier.Input_SZ_B	Multiplier	[Generic]
IIR_CEL_CTRLR.MAC::ar_MAC.Adder.Input_SZ_B	Adder	[Generic]
IIR_CEL_CTRLR.MAC::ar_MAC.MAC_MUX.Input_SZ_B	MAC_MUX	[Generic]
IIR_CEL_FILTER.Input_SZ_B	MAC	[Generic]
IIR_CEL_FILTER.MAC::ar_MAC.Multiplier.Input_SZ_B	Multiplier	[Generic]
IIR_CEL_FILTER.MAC::ar_MAC.Adder.Input_SZ_B	Adder	[Generic]
IIR_CEL_FILTER.MAC::ar_MAC.MAC_MUX.Input_SZ_B	MAC_MUX	[Generic]
APB_IIR_CEL.Logic_en	ALU	[Generic]
IIR_CEL_CTRLR.Logic_en	ALU	[Generic]
IIR_CEL_FILTER.Logic_en	ALU	[Generic]
lpp	iir_filter	[Library]
APB_IIR_CEL.lpp	APB_IIR_CEL	[Library]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.lpp	ADDRcntr	[Library]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.MUX2.lpp	MUX2	[Library]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_CONTROLER.lpp	MAC_CONTROLER	[Library]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.lpp	Multiplier	[Library]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.lpp	Adder	[Library]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_REG.lpp	MAC_REG	[Library]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_MUX.lpp	MAC_MUX	[Library]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.lpp	ADDRcntr	[Library]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.MUX2.lpp	MUX2	[Library]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_CONTROLER.lpp	MAC_CONTROLER	[Library]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.lpp	Multiplier	[Library]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.lpp	Adder	[Library]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_REG.lpp	MAC_REG	[Library]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_MUX.lpp	MAC_MUX	[Library]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.lpp	ADDRcntr	[Library]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.MUX2.lpp	MUX2	[Library]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_CONTROLER.lpp	MAC_CONTROLER	[Library]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.lpp	Multiplier	[Library]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.lpp	Adder	[Library]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_REG.lpp	MAC_REG	[Library]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_MUX.lpp	MAC_MUX	[Library]
RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.lpp	ADDRcntr	[Library]
RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.MUX2.lpp	MUX2	[Library]
lpp_amba	APB_IIR_CEL	[Package]
APB_IIR_CEL.MAC_CONTROLER1	ar_MAC	[Component Instantiation]
IIR_CEL_CTRLR.MAC_CONTROLER1	ar_MAC	[Component Instantiation]
IIR_CEL_FILTER.MAC_CONTROLER1	ar_MAC	[Component Instantiation]
APB_IIR_CEL.MAC_MUL_ADD	MAC	[Port]
IIR_CEL_CTRLR.MAC_MUL_ADD	MAC	[Port]
IIR_CEL_FILTER.MAC_MUL_ADD	MAC	[Port]
APB_IIR_CEL.MAC_MUX2_inst	ar_MAC	[Component Instantiation]
IIR_CEL_CTRLR.MAC_MUX2_inst	ar_MAC	[Component Instantiation]
IIR_CEL_FILTER.MAC_MUX2_inst	ar_MAC	[Component Instantiation]
MAC_op	iir_filter	[Constant]
APB_IIR_CEL.MACinst	ar_ALU	[Component Instantiation]
IIR_CEL_CTRLR.MACinst	ar_ALU	[Component Instantiation]
IIR_CEL_FILTER.MACinst	ar_ALU	[Component Instantiation]
APB_IIR_CEL.MACMUX2_sel	MAC_CONTROLER	[Port]
IIR_CEL_CTRLR.MACMUX2_sel	MAC_CONTROLER	[Port]
IIR_CEL_FILTER.MACMUX2_sel	MAC_CONTROLER	[Port]
APB_IIR_CEL.MACMUX2sel	ar_MAC	[Signal]
IIR_CEL_CTRLR.MACMUX2sel	ar_MAC	[Signal]
IIR_CEL_FILTER.MACMUX2sel	ar_MAC	[Signal]
APB_IIR_CEL.MACMUX2sel_D	ar_MAC	[Signal]
IIR_CEL_CTRLR.MACMUX2sel_D	ar_MAC	[Signal]
IIR_CEL_FILTER.MACMUX2sel_D	ar_MAC	[Signal]
APB_IIR_CEL.MACMUX2sel_D_D	ar_MAC	[Signal]
IIR_CEL_CTRLR.MACMUX2sel_D_D	ar_MAC	[Signal]
IIR_CEL_FILTER.MACMUX2sel_D_D	ar_MAC	[Signal]
APB_IIR_CEL.MACMUX2selREG	ar_MAC	[Component Instantiation]
IIR_CEL_CTRLR.MACMUX2selREG	ar_MAC	[Component Instantiation]
IIR_CEL_FILTER.MACMUX2selREG	ar_MAC	[Component Instantiation]
APB_IIR_CEL.MACMUX2selREG2	ar_MAC	[Component Instantiation]
IIR_CEL_CTRLR.MACMUX2selREG2	ar_MAC	[Component Instantiation]
IIR_CEL_FILTER.MACMUX2selREG2	ar_MAC	[Component Instantiation]
APB_IIR_CEL.MACMUX_inst	ar_MAC	[Component Instantiation]
IIR_CEL_CTRLR.MACMUX_inst	ar_MAC	[Component Instantiation]
IIR_CEL_FILTER.MACMUX_inst	ar_MAC	[Component Instantiation]
APB_IIR_CEL.MACMUX_sel	MAC_CONTROLER	[Port]
IIR_CEL_CTRLR.MACMUX_sel	MAC_CONTROLER	[Port]
IIR_CEL_FILTER.MACMUX_sel	MAC_CONTROLER	[Port]
APB_IIR_CEL.MACMUXsel	ar_MAC	[Signal]
IIR_CEL_CTRLR.MACMUXsel	ar_MAC	[Signal]
IIR_CEL_FILTER.MACMUXsel	ar_MAC	[Signal]
APB_IIR_CEL.MACMUXsel_D	ar_MAC	[Signal]
IIR_CEL_CTRLR.MACMUXsel_D	ar_MAC	[Signal]
IIR_CEL_FILTER.MACMUXsel_D	ar_MAC	[Signal]
APB_IIR_CEL.MACMUXselREG	ar_MAC	[Component Instantiation]
IIR_CEL_CTRLR.MACMUXselREG	ar_MAC	[Component Instantiation]
IIR_CEL_FILTER.MACMUXselREG	ar_MAC	[Component Instantiation]
APB_IIR_CEL.Mem_use	APB_IIR_CEL	[Generic]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.Mem_use	RAM_CTRLR2	[Generic]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.Mem_use	RAM_CTRLR2	[Generic]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.Mem_use	RAM_CTRLR2	[Generic]
RAM_CTRLR2.Mem_use	RAM_CTRLR2	[Generic]
APB_IIR_CEL.mult	ar_MAC	[Signal]
APB_IIR_CEL.Multiplier.mult	Multiplier	[Port]
IIR_CEL_CTRLR.mult	ar_MAC	[Signal]
IIR_CEL_CTRLR.Multiplier.mult	Multiplier	[Port]
IIR_CEL_FILTER.mult	ar_MAC	[Signal]
IIR_CEL_FILTER.Multiplier.mult	Multiplier	[Port]
MULT	iir_filter	[Constant]
APB_IIR_CEL.MULT	MAC_CONTROLER	[Port]
IIR_CEL_CTRLR.MULT	MAC_CONTROLER	[Port]
IIR_CEL_FILTER.MULT	MAC_CONTROLER	[Port]
APB_IIR_CEL.Multiplieri_nst	ar_MAC	[Component Instantiation]
IIR_CEL_CTRLR.Multiplieri_nst	ar_MAC	[Component Instantiation]
IIR_CEL_FILTER.Multiplieri_nst	ar_MAC	[Component Instantiation]
APB_IIR_CEL.MULTout	ar_MAC	[Signal]
IIR_CEL_CTRLR.MULTout	ar_MAC	[Signal]
IIR_CEL_FILTER.MULTout	ar_MAC	[Signal]
APB_IIR_CEL.MULTout_D	ar_MAC	[Signal]
IIR_CEL_CTRLR.MULTout_D	ar_MAC	[Signal]
IIR_CEL_FILTER.MULTout_D	ar_MAC	[Signal]
APB_IIR_CEL.MULToutREG	ar_MAC	[Component Instantiation]
IIR_CEL_CTRLR.MULToutREG	ar_MAC	[Component Instantiation]
IIR_CEL_FILTER.MULToutREG	ar_MAC	[Component Instantiation]
APB_IIR_CEL.MUX2_inst1	ar_RAM_CTRLR2	[Component Instantiation]
IIR_CEL_CTRLR.MUX2_inst1	ar_RAM_CTRLR2	[Component Instantiation]
IIR_CEL_FILTER.MUX2_inst1	ar_RAM_CTRLR2	[Component Instantiation]
RAM_CTRLR2.MUX2_inst1	ar_RAM_CTRLR2	[Component Instantiation]
APB_IIR_CEL.MUX2_inst2	ar_RAM_CTRLR2	[Component Instantiation]
IIR_CEL_CTRLR.MUX2_inst2	ar_RAM_CTRLR2	[Component Instantiation]
IIR_CEL_FILTER.MUX2_inst2	ar_RAM_CTRLR2	[Component Instantiation]
RAM_CTRLR2.MUX2_inst2	ar_RAM_CTRLR2	[Component Instantiation]
APB_IIR_CEL.numeric_std	APB_IIR_CEL	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.numeric_std	RAM_CTRLR2	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.RAM.numeric_std	RAM	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.RAM_CEL.numeric_std	RAM_CEL	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.numeric_std	ADDRcntr	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.MUX2.numeric_std	MUX2	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_CONTROLER.numeric_std	MAC_CONTROLER	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.numeric_std	Multiplier	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.numeric_std	Adder	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_REG.numeric_std	MAC_REG	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_MUX.numeric_std	MAC_MUX	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.numeric_std	RAM_CTRLR2	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.RAM.numeric_std	RAM	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.RAM_CEL.numeric_std	RAM_CEL	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.numeric_std	ADDRcntr	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.MUX2.numeric_std	MUX2	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_CONTROLER.numeric_std	MAC_CONTROLER	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.numeric_std	Multiplier	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.numeric_std	Adder	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_REG.numeric_std	MAC_REG	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_MUX.numeric_std	MAC_MUX	[Package]
RAM.numeric_std	RAM	[Package]
RAM_CEL.numeric_std	RAM_CEL	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.numeric_std	RAM_CTRLR2	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.RAM.numeric_std	RAM	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.RAM_CEL.numeric_std	RAM_CEL	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.numeric_std	ADDRcntr	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.MUX2.numeric_std	MUX2	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_CONTROLER.numeric_std	MAC_CONTROLER	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.numeric_std	Multiplier	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.numeric_std	Adder	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_REG.numeric_std	MAC_REG	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_MUX.numeric_std	MAC_MUX	[Package]
RAM_CTRLR2.numeric_std	RAM_CTRLR2	[Package]
RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.RAM.numeric_std	RAM	[Package]
RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.RAM_CEL.numeric_std	RAM_CEL	[Package]
RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.numeric_std	ADDRcntr	[Package]
RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.MUX2.numeric_std	MUX2	[Package]
APB_IIR_CEL.OP1	ALU	[Port]
APB_IIR_CEL.ALU::ar_ALU.MAC::ar_MAC.Multiplier.OP1	Multiplier	[Port]
APB_IIR_CEL.ALU::ar_ALU.MAC::ar_MAC.Adder.OP1	Adder	[Port]
IIR_CEL_CTRLR.OP1	ALU	[Port]
IIR_CEL_CTRLR.ALU::ar_ALU.MAC::ar_MAC.Multiplier.OP1	Multiplier	[Port]
IIR_CEL_CTRLR.ALU::ar_ALU.MAC::ar_MAC.Adder.OP1	Adder	[Port]
IIR_CEL_FILTER.OP1	ALU	[Port]
IIR_CEL_FILTER.ALU::ar_ALU.MAC::ar_MAC.Multiplier.OP1	Multiplier	[Port]
IIR_CEL_FILTER.ALU::ar_ALU.MAC::ar_MAC.Adder.OP1	Adder	[Port]
APB_IIR_CEL.OP1_D	ar_MAC	[Signal]
IIR_CEL_CTRLR.OP1_D	ar_MAC	[Signal]
IIR_CEL_FILTER.OP1_D	ar_MAC	[Signal]
APB_IIR_CEL.OP1_D_Resz	ar_MAC	[Signal]
IIR_CEL_CTRLR.OP1_D_Resz	ar_MAC	[Signal]
IIR_CEL_FILTER.OP1_D_Resz	ar_MAC	[Signal]
APB_IIR_CEL.OP1REG	ar_MAC	[Component Instantiation]
IIR_CEL_CTRLR.OP1REG	ar_MAC	[Component Instantiation]
IIR_CEL_FILTER.OP1REG	ar_MAC	[Component Instantiation]
APB_IIR_CEL.OP2	ALU	[Port]
APB_IIR_CEL.ALU::ar_ALU.MAC::ar_MAC.Multiplier.OP2	Multiplier	[Port]
APB_IIR_CEL.ALU::ar_ALU.MAC::ar_MAC.Adder.OP2	Adder	[Port]
IIR_CEL_CTRLR.OP2	ALU	[Port]
IIR_CEL_CTRLR.ALU::ar_ALU.MAC::ar_MAC.Multiplier.OP2	Multiplier	[Port]
IIR_CEL_CTRLR.ALU::ar_ALU.MAC::ar_MAC.Adder.OP2	Adder	[Port]
IIR_CEL_FILTER.OP2	ALU	[Port]
IIR_CEL_FILTER.ALU::ar_ALU.MAC::ar_MAC.Multiplier.OP2	Multiplier	[Port]
IIR_CEL_FILTER.ALU::ar_ALU.MAC::ar_MAC.Adder.OP2	Adder	[Port]
APB_IIR_CEL.OP2_D	ar_MAC	[Signal]
IIR_CEL_CTRLR.OP2_D	ar_MAC	[Signal]
IIR_CEL_FILTER.OP2_D	ar_MAC	[Signal]
APB_IIR_CEL.OP2_D_Resz	ar_MAC	[Signal]
IIR_CEL_CTRLR.OP2_D_Resz	ar_MAC	[Signal]
IIR_CEL_FILTER.OP2_D_Resz	ar_MAC	[Signal]
APB_IIR_CEL.OP2REG	ar_MAC	[Component Instantiation]
IIR_CEL_CTRLR.OP2REG	ar_MAC	[Component Instantiation]
IIR_CEL_FILTER.OP2REG	ar_MAC	[Component Instantiation]
out_IIR_CEL_reg	iir_filter	[Record]
APB_IIR_CEL.OUTA	MAC_MUX	[Port]
IIR_CEL_CTRLR.OUTA	MAC_MUX	[Port]
IIR_CEL_FILTER.OUTA	MAC_MUX	[Port]
APB_IIR_CEL.OUTB	MAC_MUX	[Port]
IIR_CEL_CTRLR.OUTB	MAC_MUX	[Port]
IIR_CEL_FILTER.OUTB	MAC_MUX	[Port]
paddr	APB_IIR_CEL	[Generic]
pconfig	AR_APB_IIR_CEL	[Constant]
pindex	APB_IIR_CEL	[Generic]
pirq	APB_IIR_CEL	[Generic]
pmask	APB_IIR_CEL	[Generic]
APB_IIR_CEL.PROCESS_10(clk, reset)	ar_IIR_CEL_CTRLR	[Process]
IIR_CEL_CTRLR.PROCESS_10(clk, reset)	ar_IIR_CEL_CTRLR	[Process]
IIR_CEL_FILTER.PROCESS_10(clk, reset)	ar_IIR_CEL_CTRLR	[Process]
APB_IIR_CEL.PROCESS_11(RWclk, reset)	DEF_ARCH	[Process]
IIR_CEL_CTRLR.PROCESS_11(RWclk, reset)	DEF_ARCH	[Process]
RAM.PROCESS_11(RWclk, reset)	DEF_ARCH	[Process]
IIR_CEL_FILTER.PROCESS_11(RWclk, reset)	DEF_ARCH	[Process]
RAM_CTRLR2.PROCESS_11(RWclk, reset)	DEF_ARCH	[Process]
APB_IIR_CEL.PROCESS_12(RWclk, reset)	ar_RAM_CEL	[Process]
IIR_CEL_CTRLR.PROCESS_12(RWclk, reset)	ar_RAM_CEL	[Process]
RAM_CEL.PROCESS_12(RWclk, reset)	ar_RAM_CEL	[Process]
IIR_CEL_FILTER.PROCESS_12(RWclk, reset)	ar_RAM_CEL	[Process]
RAM_CTRLR2.PROCESS_12(RWclk, reset)	ar_RAM_CEL	[Process]
APB_IIR_CEL.PROCESS_15(clk, reset)	ar_Adder	[Process]
IIR_CEL_CTRLR.PROCESS_15(clk, reset)	ar_Adder	[Process]
IIR_CEL_FILTER.PROCESS_15(clk, reset)	ar_Adder	[Process]
APB_IIR_CEL.PROCESS_16(clk, reset)	ar_ADDRcntr	[Process]
IIR_CEL_CTRLR.PROCESS_16(clk, reset)	ar_ADDRcntr	[Process]
IIR_CEL_FILTER.PROCESS_16(clk, reset)	ar_ADDRcntr	[Process]
RAM_CTRLR2.PROCESS_16(clk, reset)	ar_ADDRcntr	[Process]
APB_IIR_CEL.PROCESS_18(clk, reset)	ar_MAC_REG	[Process]
IIR_CEL_CTRLR.PROCESS_18(clk, reset)	ar_MAC_REG	[Process]
IIR_CEL_FILTER.PROCESS_18(clk, reset)	ar_MAC_REG	[Process]
APB_IIR_CEL.PROCESS_19(clk, reset)	ar_Multiplier	[Process]
IIR_CEL_CTRLR.PROCESS_19(clk, reset)	ar_Multiplier	[Process]
IIR_CEL_FILTER.PROCESS_19(clk, reset)	ar_Multiplier	[Process]
APB_IIR_CEL.PROCESS_20(clk, reset)	ar_REG	[Process]
IIR_CEL_CTRLR.PROCESS_20(clk, reset)	ar_REG	[Process]
IIR_CEL_FILTER.PROCESS_20(clk, reset)	ar_REG	[Process]
RAM_CTRLR2.PROCESS_20(clk, reset)	ar_REG	[Process]
PROCESS_7(rst, sample_clk)	AR_APB_IIR_CEL	[Process]
PROCESS_8(rst, clk)	AR_APB_IIR_CEL	[Process]
APB_IIR_CEL.RAM_CTRLR2.ADDRcntr.Q	ADDRcntr	[Port]
APB_IIR_CEL.RAM_CTRLR2.REG.Q	REG	[Port]
APB_IIR_CEL.ALU.Q	MAC_REG	[Port]
IIR_CEL_CTRLR.RAM_CTRLR2.ADDRcntr.Q	ADDRcntr	[Port]
IIR_CEL_CTRLR.RAM_CTRLR2.REG.Q	REG	[Port]
IIR_CEL_CTRLR.ALU.Q	MAC_REG	[Port]
IIR_CEL_FILTER.RAM_CTRLR2.ADDRcntr.Q	ADDRcntr	[Port]
IIR_CEL_FILTER.RAM_CTRLR2.REG.Q	REG	[Port]
IIR_CEL_FILTER.ALU.Q	MAC_REG	[Port]
RAM_CTRLR2.ADDRcntr.Q	ADDRcntr	[Port]
RAM_CTRLR2.REG.Q	REG	[Port]
r	AR_APB_IIR_CEL	[Signal]
APB_IIR_CEL.RADDR	ar_RAM_CTRLR2	[Signal]
APB_IIR_CEL.RAM.RADDR	RAM	[Port]
APB_IIR_CEL.RAM_CEL.RADDR	RAM_CEL	[Port]
IIR_CEL_CTRLR.RADDR	ar_RAM_CTRLR2	[Signal]
IIR_CEL_CTRLR.RAM.RADDR	RAM	[Port]
IIR_CEL_CTRLR.RAM_CEL.RADDR	RAM_CEL	[Port]
RAM.RADDR	RAM	[Port]
RAM_CEL.RADDR	RAM_CEL	[Port]
IIR_CEL_FILTER.RADDR	ar_RAM_CTRLR2	[Signal]
IIR_CEL_FILTER.RAM.RADDR	RAM	[Port]
IIR_CEL_FILTER.RAM_CEL.RADDR	RAM_CEL	[Port]
RAM_CTRLR2.RADDR	ar_RAM_CTRLR2	[Signal]
RAM_CTRLR2.RAM.RADDR	RAM	[Port]
RAM_CTRLR2.RAM_CEL.RADDR	RAM_CEL	[Port]
RAM	iir_filter	[Component]
RAM_CEL	iir_filter	[Component]
RAM_CTRLR2	iir_filter	[Component]
APB_IIR_CEL.RAM_CTRLR2inst	ar_IIR_CEL_CTRLR	[Component Instantiation]
IIR_CEL_CTRLR.RAM_CTRLR2inst	ar_IIR_CEL_CTRLR	[Component Instantiation]
IIR_CEL_FILTER.RAM_CTRLR2inst	ar_IIR_CEL_CTRLR	[Component Instantiation]
APB_IIR_CEL.RAM_sample_in	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_CTRLR.RAM_sample_in	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_FILTER.RAM_sample_in	ar_IIR_CEL_CTRLR	[Signal]
APB_IIR_CEL.RAM_sample_in_bk	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_CTRLR.RAM_sample_in_bk	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_FILTER.RAM_sample_in_bk	ar_IIR_CEL_CTRLR	[Signal]
APB_IIR_CEL.RAM_sample_out	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_CTRLR.RAM_sample_out	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_FILTER.RAM_sample_out	ar_IIR_CEL_CTRLR	[Signal]
APB_IIR_CEL.RAM.RAMarray	DEF_ARCH	[Signal]
APB_IIR_CEL.RAM_CEL.RAMarray	ar_RAM_CEL	[Signal]
IIR_CEL_CTRLR.RAM.RAMarray	DEF_ARCH	[Signal]
IIR_CEL_CTRLR.RAM_CEL.RAMarray	ar_RAM_CEL	[Signal]
RAM.RAMarray	DEF_ARCH	[Signal]
RAM_CEL.RAMarray	ar_RAM_CEL	[Signal]
IIR_CEL_FILTER.RAM.RAMarray	DEF_ARCH	[Signal]
IIR_CEL_FILTER.RAM_CEL.RAMarray	ar_RAM_CEL	[Signal]
RAM_CTRLR2.RAM.RAMarray	DEF_ARCH	[Signal]
RAM_CTRLR2.RAM_CEL.RAMarray	ar_RAM_CEL	[Signal]
APB_IIR_CEL.RAM.RAMarrayT	DEF_ARCH	[Type]
APB_IIR_CEL.RAM_CEL.RAMarrayT	ar_RAM_CEL	[Type]
IIR_CEL_CTRLR.RAM.RAMarrayT	DEF_ARCH	[Type]
IIR_CEL_CTRLR.RAM_CEL.RAMarrayT	ar_RAM_CEL	[Type]
RAM.RAMarrayT	DEF_ARCH	[Type]
RAM_CEL.RAMarrayT	ar_RAM_CEL	[Type]
IIR_CEL_FILTER.RAM.RAMarrayT	DEF_ARCH	[Type]
IIR_CEL_FILTER.RAM_CEL.RAMarrayT	ar_RAM_CEL	[Type]
RAM_CTRLR2.RAM.RAMarrayT	DEF_ARCH	[Type]
RAM_CTRLR2.RAM_CEL.RAMarrayT	ar_RAM_CEL	[Type]
APB_IIR_CEL.RAMblk	ar_RAM_CTRLR2	[Component Instantiation]
RAMblk	ar_RAM_CTRLR2	[Component Instantiation]
APB_IIR_CEL.RD	ar_RAM_CTRLR2	[Signal]
APB_IIR_CEL.RAM.RD	RAM	[Port]
APB_IIR_CEL.RAM_CEL.RD	RAM_CEL	[Port]
IIR_CEL_CTRLR.RD	ar_RAM_CTRLR2	[Signal]
IIR_CEL_CTRLR.RAM.RD	RAM	[Port]
IIR_CEL_CTRLR.RAM_CEL.RD	RAM_CEL	[Port]
RAM.RD	RAM	[Port]
RAM_CEL.RD	RAM_CEL	[Port]
IIR_CEL_FILTER.RD	ar_RAM_CTRLR2	[Signal]
IIR_CEL_FILTER.RAM.RD	RAM	[Port]
IIR_CEL_FILTER.RAM_CEL.RD	RAM_CEL	[Port]
RAM_CTRLR2.RD	ar_RAM_CTRLR2	[Signal]
RAM_CTRLR2.RAM.RD	RAM	[Port]
RAM_CTRLR2.RAM_CEL.RD	RAM_CEL	[Port]
APB_IIR_CEL.RAM.RD_int	DEF_ARCH	[Signal]
APB_IIR_CEL.RAM_CEL.RD_int	ar_RAM_CEL	[Signal]
IIR_CEL_CTRLR.RAM.RD_int	DEF_ARCH	[Signal]
IIR_CEL_CTRLR.RAM_CEL.RD_int	ar_RAM_CEL	[Signal]
RAM.RD_int	DEF_ARCH	[Signal]
RAM_CEL.RD_int	ar_RAM_CEL	[Signal]
IIR_CEL_FILTER.RAM.RD_int	DEF_ARCH	[Signal]
IIR_CEL_FILTER.RAM_CEL.RD_int	ar_RAM_CEL	[Signal]
RAM_CTRLR2.RAM.RD_int	DEF_ARCH	[Signal]
RAM_CTRLR2.RAM_CEL.RD_int	ar_RAM_CEL	[Signal]
Rdata	AR_APB_IIR_CEL	[Signal]
APB_IIR_CEL.Read	ar_IIR_CEL_CTRLR	[Signal]
APB_IIR_CEL.RAM_CTRLR2.Read	RAM_CTRLR2	[Port]
IIR_CEL_CTRLR.Read	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_CTRLR.RAM_CTRLR2.Read	RAM_CTRLR2	[Port]
IIR_CEL_FILTER.Read	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_FILTER.RAM_CTRLR2.Read	RAM_CTRLR2	[Port]
RAM_CTRLR2.Read	RAM_CTRLR2	[Port]
APB_IIR_CEL.Multiplier.REG	ar_Multiplier	[Signal]
APB_IIR_CEL.Adder.REG	ar_Adder	[Signal]
IIR_CEL_CTRLR.Multiplier.REG	ar_Multiplier	[Signal]
IIR_CEL_CTRLR.Adder.REG	ar_Adder	[Signal]
IIR_CEL_FILTER.Multiplier.REG	ar_Multiplier	[Signal]
IIR_CEL_FILTER.Adder.REG	ar_Adder	[Signal]
APB_IIR_CEL.reg	ar_ADDRcntr	[Signal]
IIR_CEL_CTRLR.reg	ar_ADDRcntr	[Signal]
IIR_CEL_FILTER.reg	ar_ADDRcntr	[Signal]
RAM_CTRLR2.reg	ar_ADDRcntr	[Signal]
APB_IIR_CEL.regs_in	IIR_CEL_FILTER	[Port]
IIR_CEL_FILTER.regs_in	IIR_CEL_FILTER	[Port]
APB_IIR_CEL.regs_out	IIR_CEL_FILTER	[Port]
IIR_CEL_FILTER.regs_out	IIR_CEL_FILTER	[Port]
APB_IIR_CEL.REN	ar_RAM_CTRLR2	[Signal]
APB_IIR_CEL.RAM.REN	RAM	[Port]
APB_IIR_CEL.RAM_CEL.REN	RAM_CEL	[Port]
IIR_CEL_CTRLR.REN	ar_RAM_CTRLR2	[Signal]
IIR_CEL_CTRLR.RAM.REN	RAM	[Port]
IIR_CEL_CTRLR.RAM_CEL.REN	RAM_CEL	[Port]
RAM.REN	RAM	[Port]
RAM_CEL.REN	RAM_CEL	[Port]
IIR_CEL_FILTER.REN	ar_RAM_CTRLR2	[Signal]
IIR_CEL_FILTER.RAM.REN	RAM	[Port]
IIR_CEL_FILTER.RAM_CEL.REN	RAM_CEL	[Port]
RAM_CTRLR2.REN	ar_RAM_CTRLR2	[Signal]
RAM_CTRLR2.RAM.REN	RAM	[Port]
RAM_CTRLR2.RAM_CEL.REN	RAM_CEL	[Port]
APB_IIR_CEL.RAM_CTRLR2.RES	MUX2	[Port]
APB_IIR_CEL.ALU.RES	ALU	[Port]
APB_IIR_CEL.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.RES	Multiplier	[Port]
APB_IIR_CEL.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.RES	Adder	[Port]
IIR_CEL_CTRLR.RAM_CTRLR2.RES	MUX2	[Port]
IIR_CEL_CTRLR.ALU.RES	ALU	[Port]
IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.RES	Multiplier	[Port]
IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.RES	Adder	[Port]
IIR_CEL_FILTER.RAM_CTRLR2.RES	MUX2	[Port]
IIR_CEL_FILTER.ALU.RES	ALU	[Port]
IIR_CEL_FILTER.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.RES	Multiplier	[Port]
IIR_CEL_FILTER.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.RES	Adder	[Port]
RAM_CTRLR2.RES	MUX2	[Port]
APB_IIR_CEL.RES1	MAC_MUX2	[Port]
IIR_CEL_CTRLR.RES1	MAC_MUX2	[Port]
IIR_CEL_FILTER.RES1	MAC_MUX2	[Port]
APB_IIR_CEL.RES2	MAC_MUX2	[Port]
IIR_CEL_CTRLR.RES2	MAC_MUX2	[Port]
IIR_CEL_FILTER.RES2	MAC_MUX2	[Port]
APB_IIR_CEL.RESADD	ar_Adder	[Signal]
IIR_CEL_CTRLR.RESADD	ar_Adder	[Signal]
IIR_CEL_FILTER.RESADD	ar_Adder	[Signal]
APB_IIR_CEL.RAM.RESET	RAM	[Port]
APB_IIR_CEL.RAM_CEL.RESET	RAM_CEL	[Port]
IIR_CEL_CTRLR.RAM.RESET	RAM	[Port]
IIR_CEL_CTRLR.RAM_CEL.RESET	RAM_CEL	[Port]
RAM.RESET	RAM	[Port]
RAM_CEL.RESET	RAM_CEL	[Port]
IIR_CEL_FILTER.RAM.RESET	RAM	[Port]
IIR_CEL_FILTER.RAM_CEL.RESET	RAM_CEL	[Port]
RAM_CTRLR2.RAM.RESET	RAM	[Port]
RAM_CTRLR2.RAM_CEL.RESET	RAM_CEL	[Port]
APB_IIR_CEL.reset	IIR_CEL_FILTER	[Port]
APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.reset	RAM_CTRLR2	[Port]
APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.reset	ADDRcntr	[Port]
APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.reset	Multiplier	[Port]
APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.reset	Adder	[Port]
APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_REG.reset	MAC_REG	[Port]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.reset	RAM_CTRLR2	[Port]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.reset	ADDRcntr	[Port]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.reset	Multiplier	[Port]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.reset	Adder	[Port]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_REG.reset	MAC_REG	[Port]
IIR_CEL_FILTER.reset	IIR_CEL_FILTER	[Port]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.reset	RAM_CTRLR2	[Port]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.reset	ADDRcntr	[Port]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.reset	Multiplier	[Port]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.reset	Adder	[Port]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_REG.reset	MAC_REG	[Port]
RAM_CTRLR2.reset	RAM_CTRLR2	[Port]
RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.reset	ADDRcntr	[Port]
APB_IIR_CEL.RESMULT	ar_Multiplier	[Signal]
IIR_CEL_CTRLR.RESMULT	ar_Multiplier	[Signal]
IIR_CEL_FILTER.RESMULT	ar_Multiplier	[Signal]
REVISION	AR_APB_IIR_CEL	[Constant]
rst	APB_IIR_CEL	[Port]
APB_IIR_CEL.RAM.RWCLK	RAM	[Port]
APB_IIR_CEL.RAM_CEL.RWCLK	RAM_CEL	[Port]
IIR_CEL_CTRLR.RAM.RWCLK	RAM	[Port]
IIR_CEL_CTRLR.RAM_CEL.RWCLK	RAM_CEL	[Port]
RAM.RWCLK	RAM	[Port]
RAM_CEL.RWCLK	RAM_CEL	[Port]
IIR_CEL_FILTER.RAM.RWCLK	RAM	[Port]
IIR_CEL_FILTER.RAM_CEL.RWCLK	RAM_CEL	[Port]
RAM_CTRLR2.RAM.RWCLK	RAM	[Port]
RAM_CTRLR2.RAM_CEL.RWCLK	RAM_CEL	[Port]
sample_clk	APB_IIR_CEL	[Port]
sample_clk_out	APB_IIR_CEL	[Port]
sample_clk_out_R	AR_APB_IIR_CEL	[Signal]
APB_IIR_CEL.sample_in	APB_IIR_CEL	[Port]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.sample_in	RAM_CTRLR2	[Port]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.sample_in	RAM_CTRLR2	[Port]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.sample_in	RAM_CTRLR2	[Port]
RAM_CTRLR2.sample_in	RAM_CTRLR2	[Port]
APB_IIR_CEL.sample_in_BUFF	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_CTRLR.sample_in_BUFF	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_FILTER.sample_in_BUFF	ar_IIR_CEL_CTRLR	[Signal]
APB_IIR_CEL.sample_out	APB_IIR_CEL	[Port]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.sample_out	RAM_CTRLR2	[Port]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.sample_out	RAM_CTRLR2	[Port]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.sample_out	RAM_CTRLR2	[Port]
RAM_CTRLR2.sample_out	RAM_CTRLR2	[Port]
APB_IIR_CEL.sample_out_BUFF	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_CTRLR.sample_out_BUFF	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_FILTER.sample_out_BUFF	ar_IIR_CEL_CTRLR	[Signal]
Sample_SZ	APB_IIR_CEL	[Generic]
APB_IIR_CEL.sampleBuffT	ar_IIR_CEL_CTRLR	[Type]
IIR_CEL_CTRLR.sampleBuffT	ar_IIR_CEL_CTRLR	[Type]
IIR_CEL_FILTER.sampleBuffT	ar_IIR_CEL_CTRLR	[Type]
APB_IIR_CEL.sampleVect	ar_IIR_CEL_CTRLR	[Subtype]
IIR_CEL_CTRLR.sampleVect	ar_IIR_CEL_CTRLR	[Subtype]
IIR_CEL_FILTER.sampleVect	ar_IIR_CEL_CTRLR	[Subtype]
samplT	iir_filter	[Type]
scaleValT	iir_filter	[Type]
APB_IIR_CEL.RAM_CTRLR2.sel	MUX2	[Port]
APB_IIR_CEL.ALU.MAC_MUX.sel	MAC_MUX	[Port]
APB_IIR_CEL.ALU.MAC_MUX2.sel	MAC_MUX2	[Port]
IIR_CEL_CTRLR.RAM_CTRLR2.sel	MUX2	[Port]
IIR_CEL_CTRLR.ALU.MAC_MUX.sel	MAC_MUX	[Port]
IIR_CEL_CTRLR.ALU.MAC_MUX2.sel	MAC_MUX2	[Port]
IIR_CEL_FILTER.RAM_CTRLR2.sel	MUX2	[Port]
IIR_CEL_FILTER.ALU.MAC_MUX.sel	MAC_MUX	[Port]
IIR_CEL_FILTER.ALU.MAC_MUX2.sel	MAC_MUX2	[Port]
RAM_CTRLR2.sel	MUX2	[Port]
APB_IIR_CEL.RAM_CTRLR2.size	REG	[Generic]
APB_IIR_CEL.ALU.size	MAC_REG	[Generic]
IIR_CEL_CTRLR.RAM_CTRLR2.size	REG	[Generic]
IIR_CEL_CTRLR.ALU.size	MAC_REG	[Generic]
IIR_CEL_FILTER.RAM_CTRLR2.size	REG	[Generic]
IIR_CEL_FILTER.ALU.size	MAC_REG	[Generic]
RAM_CTRLR2.size	REG	[Generic]
smp_cnt	AR_APB_IIR_CEL	[Signal]
APB_IIR_CEL.smpl_clk_old	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_CTRLR.smpl_clk_old	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_FILTER.smpl_clk_old	ar_IIR_CEL_CTRLR	[Signal]
std_logic_1164	iir_filter	[Package]
APB_IIR_CEL.std_logic_1164	APB_IIR_CEL	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.RAM.std_logic_1164	RAM	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.RAM_CEL.std_logic_1164	RAM_CEL	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.std_logic_1164	ADDRcntr	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.MUX2.std_logic_1164	MUX2	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_CONTROLER.std_logic_1164	MAC_CONTROLER	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.std_logic_1164	Multiplier	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.std_logic_1164	Adder	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_REG.std_logic_1164	MAC_REG	[Package]
APB_IIR_CEL.APB_IIR_CEL::AR_APB_IIR_CEL.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_MUX.std_logic_1164	MAC_MUX	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.RAM.std_logic_1164	RAM	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.RAM_CEL.std_logic_1164	RAM_CEL	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.std_logic_1164	ADDRcntr	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.MUX2.std_logic_1164	MUX2	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_CONTROLER.std_logic_1164	MAC_CONTROLER	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.std_logic_1164	Multiplier	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.std_logic_1164	Adder	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_REG.std_logic_1164	MAC_REG	[Package]
IIR_CEL_CTRLR.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_MUX.std_logic_1164	MAC_MUX	[Package]
RAM.std_logic_1164	RAM	[Package]
RAM_CEL.std_logic_1164	RAM_CEL	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.RAM.std_logic_1164	RAM	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.RAM_CEL.std_logic_1164	RAM_CEL	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.std_logic_1164	ADDRcntr	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.MUX2.std_logic_1164	MUX2	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_CONTROLER.std_logic_1164	MAC_CONTROLER	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Multiplier.std_logic_1164	Multiplier	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.Adder.std_logic_1164	Adder	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_REG.std_logic_1164	MAC_REG	[Package]
IIR_CEL_FILTER.IIR_CEL_FILTER::ar_IIR_CEL_FILTER.IIR_CEL_CTRLR::ar_IIR_CEL_CTRLR.ALU.ALU::ar_ALU.MAC::ar_MAC.MAC_MUX.std_logic_1164	MAC_MUX	[Package]
RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.RAM.std_logic_1164	RAM	[Package]
RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.RAM_CEL.std_logic_1164	RAM_CEL	[Package]
RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.ADDRcntr.std_logic_1164	ADDRcntr	[Package]
RAM_CTRLR2.RAM_CTRLR2::ar_RAM_CTRLR2.MUX2.std_logic_1164	MUX2	[Package]
stdlib	iir_filter	[Package]
APB_IIR_CEL.stdlib	APB_IIR_CEL	[Package]
APB_IIR_CEL.SVG_ADDR	ar_IIR_CEL_CTRLR	[Signal]
APB_IIR_CEL.RAM_CTRLR2.SVG_ADDR	RAM_CTRLR2	[Port]
IIR_CEL_CTRLR.SVG_ADDR	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_CTRLR.RAM_CTRLR2.SVG_ADDR	RAM_CTRLR2	[Port]
IIR_CEL_FILTER.SVG_ADDR	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_FILTER.RAM_CTRLR2.SVG_ADDR	RAM_CTRLR2	[Port]
RAM_CTRLR2.SVG_ADDR	RAM_CTRLR2	[Port]
use_CEL	iir_filter	[Constant]
use_RAM	iir_filter	[Constant]
APB_IIR_CEL.virg_pos	ar_IIR_CEL_FILTER	[Signal]
IIR_CEL_FILTER.virg_pos	ar_IIR_CEL_FILTER	[Signal]
virgPos	APB_IIR_CEL	[Generic]
APB_IIR_CEL.WADDR	ar_RAM_CTRLR2	[Signal]
APB_IIR_CEL.RAM.WADDR	RAM	[Port]
APB_IIR_CEL.RAM_CEL.WADDR	RAM_CEL	[Port]
IIR_CEL_CTRLR.WADDR	ar_RAM_CTRLR2	[Signal]
IIR_CEL_CTRLR.RAM.WADDR	RAM	[Port]
IIR_CEL_CTRLR.RAM_CEL.WADDR	RAM_CEL	[Port]
RAM.WADDR	RAM	[Port]
RAM_CEL.WADDR	RAM_CEL	[Port]
IIR_CEL_FILTER.WADDR	ar_RAM_CTRLR2	[Signal]
IIR_CEL_FILTER.RAM.WADDR	RAM	[Port]
IIR_CEL_FILTER.RAM_CEL.WADDR	RAM_CEL	[Port]
RAM_CTRLR2.WADDR	ar_RAM_CTRLR2	[Signal]
RAM_CTRLR2.RAM.WADDR	RAM	[Port]
RAM_CTRLR2.RAM_CEL.WADDR	RAM_CEL	[Port]
APB_IIR_CEL.WADDR_back	ar_RAM_CTRLR2	[Signal]
IIR_CEL_CTRLR.WADDR_back	ar_RAM_CTRLR2	[Signal]
IIR_CEL_FILTER.WADDR_back	ar_RAM_CTRLR2	[Signal]
RAM_CTRLR2.WADDR_back	ar_RAM_CTRLR2	[Signal]
APB_IIR_CEL.WADDR_back_D	ar_RAM_CTRLR2	[Signal]
IIR_CEL_CTRLR.WADDR_back_D	ar_RAM_CTRLR2	[Signal]
IIR_CEL_FILTER.WADDR_back_D	ar_RAM_CTRLR2	[Signal]
RAM_CTRLR2.WADDR_back_D	ar_RAM_CTRLR2	[Signal]
APB_IIR_CEL.WADDR_backreg	ar_RAM_CTRLR2	[Component Instantiation]
IIR_CEL_CTRLR.WADDR_backreg	ar_RAM_CTRLR2	[Component Instantiation]
IIR_CEL_FILTER.WADDR_backreg	ar_RAM_CTRLR2	[Component Instantiation]
RAM_CTRLR2.WADDR_backreg	ar_RAM_CTRLR2	[Component Instantiation]
APB_IIR_CEL.WADDR_backreg2	ar_RAM_CTRLR2	[Component Instantiation]
IIR_CEL_CTRLR.WADDR_backreg2	ar_RAM_CTRLR2	[Component Instantiation]
IIR_CEL_FILTER.WADDR_backreg2	ar_RAM_CTRLR2	[Component Instantiation]
RAM_CTRLR2.WADDR_backreg2	ar_RAM_CTRLR2	[Component Instantiation]
APB_IIR_CEL.WADDR_D	ar_RAM_CTRLR2	[Signal]
IIR_CEL_CTRLR.WADDR_D	ar_RAM_CTRLR2	[Signal]
IIR_CEL_FILTER.WADDR_D	ar_RAM_CTRLR2	[Signal]
RAM_CTRLR2.WADDR_D	ar_RAM_CTRLR2	[Signal]
APB_IIR_CEL.WADDR_sel	ar_IIR_CEL_CTRLR	[Signal]
APB_IIR_CEL.RAM_CTRLR2.WADDR_sel	RAM_CTRLR2	[Port]
IIR_CEL_CTRLR.WADDR_sel	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_CTRLR.RAM_CTRLR2.WADDR_sel	RAM_CTRLR2	[Port]
IIR_CEL_FILTER.WADDR_sel	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_FILTER.RAM_CTRLR2.WADDR_sel	RAM_CTRLR2	[Port]
RAM_CTRLR2.WADDR_sel	RAM_CTRLR2	[Port]
APB_IIR_CEL.WD	ar_RAM_CTRLR2	[Signal]
APB_IIR_CEL.RAM.WD	RAM	[Port]
APB_IIR_CEL.RAM_CEL.WD	RAM_CEL	[Port]
IIR_CEL_CTRLR.WD	ar_RAM_CTRLR2	[Signal]
IIR_CEL_CTRLR.RAM.WD	RAM	[Port]
IIR_CEL_CTRLR.RAM_CEL.WD	RAM_CEL	[Port]
RAM.WD	RAM	[Port]
RAM_CEL.WD	RAM_CEL	[Port]
IIR_CEL_FILTER.WD	ar_RAM_CTRLR2	[Signal]
IIR_CEL_FILTER.RAM.WD	RAM	[Port]
IIR_CEL_FILTER.RAM_CEL.WD	RAM_CEL	[Port]
RAM_CTRLR2.WD	ar_RAM_CTRLR2	[Signal]
RAM_CTRLR2.RAM.WD	RAM	[Port]
RAM_CTRLR2.RAM_CEL.WD	RAM_CEL	[Port]
APB_IIR_CEL.WD_D	ar_RAM_CTRLR2	[Signal]
IIR_CEL_CTRLR.WD_D	ar_RAM_CTRLR2	[Signal]
IIR_CEL_FILTER.WD_D	ar_RAM_CTRLR2	[Signal]
RAM_CTRLR2.WD_D	ar_RAM_CTRLR2	[Signal]
APB_IIR_CEL.WD_sel	ar_IIR_CEL_CTRLR	[Signal]
APB_IIR_CEL.RAM_CTRLR2.WD_sel	RAM_CTRLR2	[Port]
IIR_CEL_CTRLR.WD_sel	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_CTRLR.RAM_CTRLR2.WD_sel	RAM_CTRLR2	[Port]
IIR_CEL_FILTER.WD_sel	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_FILTER.RAM_CTRLR2.WD_sel	RAM_CTRLR2	[Port]
RAM_CTRLR2.WD_sel	RAM_CTRLR2	[Port]
APB_IIR_CEL.WDRreg	ar_RAM_CTRLR2	[Component Instantiation]
IIR_CEL_CTRLR.WDRreg	ar_RAM_CTRLR2	[Component Instantiation]
IIR_CEL_FILTER.WDRreg	ar_RAM_CTRLR2	[Component Instantiation]
RAM_CTRLR2.WDRreg	ar_RAM_CTRLR2	[Component Instantiation]
APB_IIR_CEL.WEN	ar_RAM_CTRLR2	[Signal]
APB_IIR_CEL.RAM.WEN	RAM	[Port]
APB_IIR_CEL.RAM_CEL.WEN	RAM_CEL	[Port]
IIR_CEL_CTRLR.WEN	ar_RAM_CTRLR2	[Signal]
IIR_CEL_CTRLR.RAM.WEN	RAM	[Port]
IIR_CEL_CTRLR.RAM_CEL.WEN	RAM_CEL	[Port]
RAM.WEN	RAM	[Port]
RAM_CEL.WEN	RAM_CEL	[Port]
IIR_CEL_FILTER.WEN	ar_RAM_CTRLR2	[Signal]
IIR_CEL_FILTER.RAM.WEN	RAM	[Port]
IIR_CEL_FILTER.RAM_CEL.WEN	RAM_CEL	[Port]
RAM_CTRLR2.WEN	ar_RAM_CTRLR2	[Signal]
RAM_CTRLR2.RAM.WEN	RAM	[Port]
RAM_CTRLR2.RAM_CEL.WEN	RAM_CEL	[Port]
APB_IIR_CEL.Write	ar_IIR_CEL_CTRLR	[Signal]
APB_IIR_CEL.RAM_CTRLR2.Write	RAM_CTRLR2	[Port]
IIR_CEL_CTRLR.Write	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_CTRLR.RAM_CTRLR2.Write	RAM_CTRLR2	[Port]
IIR_CEL_FILTER.Write	ar_IIR_CEL_CTRLR	[Signal]
IIR_CEL_FILTER.RAM_CTRLR2.Write	RAM_CTRLR2	[Port]
RAM_CTRLR2.Write	RAM_CTRLR2	[Port]