- s -

• s_empty : ar_Top_FIFO , ar_Top_FifoRead
• s_flag_RE : ar_Top_FifoRead , ar_Top_FIFO
• s_flag_WR : ar_Top_FIFO , ar_Top_FifoWrite
• s_full : ar_Top_FIFO , ar_Top_FifoWrite
• s_SCLK : ar_CNA_TabloC
• sample : ar_lpp_apb_ad_conv , FilterCTRLR
• Sample : ar_FILTER
• sample_clk : APB_IIR_CEL , FILTER , FilterCTRLR , IIR_CEL_CTRLR , IIR_CEL_FILTER
• sample_clk_old : ar_FilterCTRLR
• sample_clk_out : APB_IIR_CEL
• sample_clk_out_R : AR_APB_IIR_CEL
• Sample_IN : FILTER
• sample_in : APB_IIR_CEL , FILTER_RAM_CTRLR , FilterCTRLR , IIR_CEL_CTRLR , IIR_CEL_FILTER , RAM_CTRLR2
• sample_in_BUFF : ar_IIR_CEL_CTRLR
• sample_out : APB_IIR_CEL , FILTER_RAM_CTRLR , IIR_CEL_CTRLR , IIR_CEL_FILTER , RAM_CTRLR2
• Sample_OUT : FILTER
• sample_out_BUFF : ar_IIR_CEL_CTRLR
• Sample_SZ : APB_IIR_CEL , IIR_CEL_CTRLR , IIR_CEL_FILTER
• sampleBuffT : ar_IIR_CEL_CTRLR
• Samples_out : lpp_ad_conv
• sampleVect : ar_IIR_CEL_CTRLR
• samplT : iir_filter
• Scalefac_SZ : FILTERcfg
• scaleValT : iir_filter
• SCK : lpp_ad_conv
• Sclk : Shift_REG
• SCLK : APB_CNA , CNA_TabloC , Gene_SYNC
• sclk : Serialize , Systeme_Clock
• SDI : lpp_ad_conv
• sdi : AD7688_spi_if
• sel : MAC_MUX , MAC_MUX2 , MUX2
• send : Serialize
• Send : ar_APB_UART , UART
• sended : Serialize
• Sended : ar_APB_UART , UART
• Serial : ar_CNA_TabloC
• Serial_reg : ar_Shift_REG
• Serialize : lpp_cna , Shift_REG
• Serialize_reg : ar_Shift_REG
• Serialized : Shift_REG
• Serialized_int : ar_Shift_REG
• SetEntryMode : LCD_16x2_CFG
• SF_CE0 : apb_lcd_ctrlr , AMBA_LCD_16x2_DRIVER
• shift : RShifter
• shift_reg : ar_AD7688_spi_if
• Shift_REG : lpp_uart
• shift_SZ : RShifter
• ShortTimePulse : Behavioral
• Signal_sync : ar_CNA_TabloC
• SIN : Shift_REG
• size : MAC_REG , REG
• smp_cnt : AR_APB_IIR_CEL
• smpClkHz : lpp_apb_ad_conv
• smpl_clk_old : ar_IIR_CEL_CTRLR
• Smpl_SZ : FILTER , FILTERcfg
• smplClk : AD7688_drvr , ADS7886_drvr , ar_lpp_apb_ad_conv
• smplClk_reg : ar_AD7688_drvr , ar_ADS7886_drvr
• smpout : AD7688_drvr , AD7688_spi_if , ADS7886_drvr , ar_lpp_apb_ad_conv
• smpout_int : ar_ADS7886_drvr
• SOUT : Shift_REG
• spidrvr : ar_AD7688_drvr , ar_ADS7886_drvr
• SRAM : ar_Top_FIFO , ar_Top_FifoRead , ar_Top_FifoWrite
• Start : Behavioral
• start : ar_APB_FFT
• state : Behavioral , ar_LCD_16x2_ENGINE , Behavioral , ar_FilterCTRLR
• state_t : ar_LCD_16x2_ENGINE
• STATEOUT : LCD_2x16_DRIVER
• stateT : Behavioral , ar_FilterCTRLR
• status : iir_filter
• std_logic_1164 : iir_filter , ADDRcntr , MAC_MUX
• STD_LOGIC_1164 : lpp_apb_ad_conv , AD7688_spi_if
• std_logic_1164 : APB_IIR_CEL , Fifo_Read , UART , amba_lcd_16x2_ctrlr , APB_FIFO , Link_Reg , FILTER_RAM_CTRLR , FILTERcfg , Top_FifoWrite , Top_FIFO , Systeme_Clock , APB_FifoRead , ALU , APB_CNA , MAC_CONTROLER , IIR_CEL_FILTER , RAM , BaudGen , MAC_MUX2 , RAM_CTRLR2 , TestbenshMAC , MAC , Flag_Extremum , lpp_fft , Adder , Shift_REG , general_purpose , RAM_CEL , APB_FFT , lpp_uart
• STD_LOGIC_1164 : LCD_CLK_GENERATOR
• std_logic_1164 : REG
• STD_LOGIC_1164 : AD7688_drvr , AMBA_LCD_16x2_DRIVER , LCD_2x16_DRIVER , LCD_16x2_DRIVER , FRAME_CLK_GEN
• std_logic_1164 : IIR_CEL_CTRLR , APB_FifoWrite , CNA_TabloC , APB_SIMPLE_DIODE , Convertisseur_config , FILTER
• STD_LOGIC_1164 : LCD_16x2_CFG
• std_logic_1164 : FilterCTRLR , Top_FifoRead
• STD_LOGIC_1164 : lpp_ad_conv
• std_logic_1164 : Fifo_Write
• STD_LOGIC_1164 : ADS7886_drvr
• std_logic_1164 : ApbDriver , lpp_memory , APB_UART
• STD_LOGIC_1164 : Clk_divider , LCD_16x2_ENGINE
• std_logic_1164 : Serialize , lpp_amba
• STD_LOGIC_1164 : apb_lcd_ctrlr
• std_logic_1164 : lpp_cna , Gene_SYNC , TestbenshALU , MAC_REG , APB_MULTI_DIODE , Multiplier , RShifter , MUX2
• stdlib : APB_FFT , ApbDriver , APB_CNA , APB_FifoWrite , amba_lcd_16x2_ctrlr , iir_filter , APB_FifoRead , lpp_apb_ad_conv , APB_MULTI_DIODE , APB_SIMPLE_DIODE , APB_FIFO , lpp_ad_conv , APB_IIR_CEL , APB_UART , apb_lcd_ctrlr
• SVG_ADDR : RAM_CTRLR2 , ar_IIR_CEL_CTRLR
• switch : lpp_fft
• SYNC : APB_CNA , CNA_TabloC , Gene_SYNC
• SYNCH : ar_LCD_16x2_ENGINE , LCD_16x2_DRIVER
• syncram_2p : ar_Top_FifoWrite , ar_Top_FIFO , ar_Top_FifoRead
• SystemCLK : ar_CNA_TabloC
• Systeme_Clock : lpp_cna